diff options
| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2012-05-10 13:01:22 +0300 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2012-05-10 16:35:28 -0600 |
| commit | c8f925b69fec7d147cb22cbeec50fbcb2ec5580b (patch) | |
| tree | d65008c7c06ba32fd763eb1981a2d0d846d68216 | |
| parent | 465f2bd459c3143a4f93c2cf2de2c6ebb8f94947 (diff) | |
gpio/langwell: re-read the IRQ status register after each iteration
The IRQ status register should be re-read after each iteration.
Otherwise the loop misses the interrupt if it gets raised immediately
after handled.
Reported-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| -rw-r--r-- | drivers/gpio/gpio-langwell.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index b0673574dc70..a1c8754f52cf 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c @@ -250,11 +250,9 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) /* check GPIO controller to check which pin triggered the interrupt */ for (base = 0; base < lnw->chip.ngpio; base += 32) { gedr = gpio_reg(&lnw->chip, base, GEDR); - pending = readl(gedr); - while (pending) { + while ((pending = readl(gedr))) { gpio = __ffs(pending); mask = BIT(gpio); - pending &= ~mask; /* Clear before handling so we can't lose an edge */ writel(mask, gedr); generic_handle_irq(irq_find_mapping(lnw->domain, |