diff options
| author | Scott Wood <oss@buserror.net> | 2016-09-22 03:35:15 -0500 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2016-09-23 16:23:04 +0100 |
| commit | 22e43390456152f6e72ad2632e2b3fb363e94146 (patch) | |
| tree | 8e8c6ac677c6acafa549db0342f3cb2aae1df82b | |
| parent | ca219452c6b8a6cd1369b6a78b1cf069d0386865 (diff) | |
arm64: arch_timer: Add device tree binding for A-008585 erratum
This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward. So, describe it
in the device tree.
Signed-off-by: Scott Wood <oss@buserror.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/arch_timer.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index e774128935d5..ef5fbe9a77c7 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -25,6 +25,12 @@ to deliver its interrupts via SPIs. - always-on : a boolean property. If present, the timer is powered through an always-on power domain, therefore it never loses context. +- fsl,erratum-a008585 : A boolean property. Indicates the presence of + QorIQ erratum A-008585, which says that reading the counter is + unreliable unless the same value is returned by back-to-back reads. + This also affects writes to the tval register, due to the implicit + counter read. + ** Optional properties: - arm,cpu-registers-not-fw-configured : Firmware does not initialize |