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authorHeiko Stuebner <heiko@sntech.de>2015-08-21 19:51:41 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-09-10 13:55:21 -0700
commitbb0f73616396e7929b68d3bdea70064003599d33 (patch)
treebc1ddd653a8b30fbd5df37decb9f96f0b3654fb9
parent9f42a89da6b4dc015631e01ba990d3db2cae2a1b (diff)
clk: rockchip: handle critical clocks after registering all clocks
Currently the registration of critical clocks is done in the function shared between rk3066 and rk3188 clock trees. That results in them getting handled maybe before all of them are registered. Therefore move the critical clock handling down to the end of the soc- specific clock registration function, so that all clocks are registered before they're maybe handled as critical clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Michael Niewoehner <linux@mniewoehner.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/rockchip/clk-rk3188.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index ed02bbc7b11f..f26e3edaab2f 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -744,8 +744,6 @@ static void __init rk3188_common_clk_init(struct device_node *np)
rockchip_clk_register_branches(common_clk_branches,
ARRAY_SIZE(common_clk_branches));
- rockchip_clk_protect_critical(rk3188_critical_clocks,
- ARRAY_SIZE(rk3188_critical_clocks));
rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
ROCKCHIP_SOFTRST_HIWORD_MASK);
@@ -765,6 +763,8 @@ static void __init rk3066a_clk_init(struct device_node *np)
mux_armclk_p, ARRAY_SIZE(mux_armclk_p),
&rk3066_cpuclk_data, rk3066_cpuclk_rates,
ARRAY_SIZE(rk3066_cpuclk_rates));
+ rockchip_clk_protect_critical(rk3188_critical_clocks,
+ ARRAY_SIZE(rk3188_critical_clocks));
}
CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init);
@@ -801,6 +801,9 @@ static void __init rk3188a_clk_init(struct device_node *np)
pr_warn("%s: missing clocks to reparent aclk_cpu_pre to gpll\n",
__func__);
}
+
+ rockchip_clk_protect_critical(rk3188_critical_clocks,
+ ARRAY_SIZE(rk3188_critical_clocks));
}
CLK_OF_DECLARE(rk3188a_cru, "rockchip,rk3188a-cru", rk3188a_clk_init);