diff options
| author | Danny Nold <dannynold@freescale.com> | 2011-04-04 21:20:59 -0500 |
|---|---|---|
| committer | Danny Nold <dannynold@freescale.com> | 2011-04-07 20:53:36 -0500 |
| commit | c9da2ceae2eee642afcf19e7001e9882b3689b16 (patch) | |
| tree | 72df80613719ed66ff391b5f3c2352afb2dfb5f0 | |
| parent | 9e4acd9c98323999940a0d3e99a4a576b6ff123e (diff) | |
ENGR00140983-1 - MX50 IOMUX: Add defines to use LCDIF through EPDC pads
- Defined IOMUX settings to allow use of EPDC pins for ELCDIF functionality.
Signed-off-by: Danny Nold <dannynold@freescale.com>
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx50.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/plat-mxc/include/mach/iomux-mx50.h index 4748681f0c93..6220b96463eb 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx50.h @@ -459,6 +459,67 @@ #define MX50_PAD_DISP_WR__ELCDIF_PIXCLK IOMUX_PAD(0x42C, 0x14C, 2, 0x0, 0, \ MX50_ELCDIF_PAD_CTRL) +/* HDMI */ +#define MX50_PAD_EPDC_SDCE5__ELCDIF_D0 IOMUX_PAD(0x5F4, 0x258, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCE4__ELCDIF_D1 IOMUX_PAD(0x5F0, 0x254, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCE3__ELCDIF_D2 IOMUX_PAD(0x5EC, 0x250, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCE2__ELCDIF_D3 IOMUX_PAD(0x5E8, 0x24C, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCE1__ELCDIF_D4 IOMUX_PAD(0x5E4, 0x248, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCE0__ELCDIF_D5 IOMUX_PAD(0x5E0, 0x244, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_BDR1__ELCDIF_D6 IOMUX_PAD(0x5DC, 0x240, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_BDR0__ELCDIF_D7 IOMUX_PAD(0x5D8, 0x23C, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDLE__ELCDIF_D8 IOMUX_PAD(0x5AC, 0x210, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCLKN__ELCDIF_D9 IOMUX_PAD(0x5B0, 0x214, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDSHR__ELCDIF_D10 IOMUX_PAD(0x5B4, 0x218, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_PWRCOM__ELCDIF_D11 IOMUX_PAD(0x5B8, 0x21C, 3, \ + 0x0, 0, MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_PWRSTAT__ELCDIF_D12 IOMUX_PAD(0x5BC, 0x220, 3, \ + 0x0, 0, MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_PWRCTRL0__ELCDIF_D13 IOMUX_PAD(0x5C0, 0x224, 3, \ + 0x0, 0, MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_PWRCTRL1__ELCDIF_D14 IOMUX_PAD(0x5C4, 0x228, 3, \ + 0x0, 0, MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_PWRCTRL2__ELCDIF_D15 IOMUX_PAD(0x5C8, 0x22C, 3, \ + 0x0, 0, MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_GDCLK__ELCDIF_D16 IOMUX_PAD(0x58C, 0x1F0, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_GDSP__ELCDIF_D17 IOMUX_PAD(0x590, 0x1F4, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_GDOE__ELCDIF_D18 IOMUX_PAD(0x594, 0x1F8, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_GDRL__ELCDIF_D19 IOMUX_PAD(0x598, 0x1FC, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDCLK__ELCDIF_D20 IOMUX_PAD(0x59C, 0x200, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDOEZ__ELCDIF_D21 IOMUX_PAD(0x5A0, 0x204, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDOED__ELCDIF_D22 IOMUX_PAD(0x5A4, 0x208, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_SDOE__ELCDIF_D23 IOMUX_PAD(0x5A8, 0x20C, 3, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_D2__ELCDIF_VSYNC IOMUX_PAD(0x554, 0x1B8, 4, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_D3__ELCDIF_HSYNC IOMUX_PAD(0x558, 0x1BC, 4, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_D1__ELCDIF_EN IOMUX_PAD(0x550, 0x1B4, 4, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EPDC_D0__ELCDIF_DCLK IOMUX_PAD(0x54C, 0x1B0, 4, 0x0, 0, \ + MX50_ELCDIF_PAD_CTRL) +#define MX50_PAD_EIM_LBA__GPIO_1_26 IOMUX_PAD(0x660, 0x2C4, 1, 0x0, 0, 0) +#define MX50_PAD_EIM_OE__GPIO_1_24 IOMUX_PAD(0x658, 0x2BC, 1, 0x0, 0, 0) + + /* USB */ #define MX50_PAD_EPITO__USBH1_PWR IOMUX_PAD(0x310, 0x64, 2, 0x0, 0, \ PAD_CTL_PKE | PAD_CTL_DSE_HIGH) |