video: tegra: support display board PM313

This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode

Bug ID : 822980
Reviewed-on: http://git-master/r/50215
(cherry picked from commit b83e795747fa860b5b7fb66b2067ebe4f15bcfd0)

Change-Id: Iabf707ded2976e9877481c215d0b1f1940781f14
Reviewed-on: http://git-master/r/60085
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re8eadc35c75fa21b0a5f3cb3bee0e8cb77dc3238

9 files changed, 281 insertions, 55 deletions

diff --git a/arch/arm/mach-tegra/board-cardhu-panel.c b/arch/arm/mach-tegra/board-cardhu-panel.c
index 1bea26d26411..5702faf6a4ec 100644
--- a/arch/arm/mach-tegra/board-cardhu-panel.c
+++ b/arch/arm/mach-tegra/board-cardhu-panel.c
@@ -38,22 +38,37 @@
 #include "devices.h"
 #include "gpio-names.h"
 
-/* Select panel to be used. */
+/* Select DSI panel to be used. */
 #define DSI_PANEL_219 0
 #define DSI_PANEL_218 1
 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
 #define DSI_PANEL_RESET 0
 
-#define pm269_lvds_shutdown	TEGRA_GPIO_PN6
-#define cardhu_lvds_shutdown	TEGRA_GPIO_PL2
-#define cardhu_bl_enb		TEGRA_GPIO_PH2
-#define cardhu_bl_pwm		TEGRA_GPIO_PH0
-#define cardhu_hdmi_hpd		TEGRA_GPIO_PN7
+/* Select LVDS panel resolution. 13X7 is default */
+#define PM313_LVDS_PANEL_19X12_18BPP		1
+
+/* PM313 display board specific pins */
+#define pm313_R_FDE			TEGRA_GPIO_PW0
+#define pm313_R_FB			TEGRA_GPIO_PN4
+#define pm313_MODE0			TEGRA_GPIO_PZ4
+#define pm313_MODE1			TEGRA_GPIO_PW1
+#define pm313_lvds_shutdown		TEGRA_GPIO_PH1
+
+/* E1247 reworked for pm269 pins */
+#define e1247_pm269_lvds_shutdown	TEGRA_GPIO_PN6
+
+/* E1247 cardhu default display board pins */
+#define cardhu_lvds_shutdown		TEGRA_GPIO_PL2
+
+/* common pins( backlight ) for all display boards */
+#define cardhu_bl_enb			TEGRA_GPIO_PH2
+#define cardhu_bl_pwm			TEGRA_GPIO_PH0
+#define cardhu_hdmi_hpd			TEGRA_GPIO_PN7
 
 #if defined(DSI_PANEL_219) || defined(DSI_PANEL_218)
-#define cardhu_dsia_bl_enb	TEGRA_GPIO_PW1
-#define cardhu_dsib_bl_enb	TEGRA_GPIO_PW0
-#define cardhu_dsi_panel_reset	TEGRA_GPIO_PD2
+#define cardhu_dsia_bl_enb		TEGRA_GPIO_PW1
+#define cardhu_dsib_bl_enb		TEGRA_GPIO_PW0
+#define cardhu_dsi_panel_reset		TEGRA_GPIO_PD2
 #endif
 
 #ifdef CONFIG_TEGRA_DC
@@ -73,6 +88,7 @@ static struct regulator *cardhu_lvds_vdd_panel = NULL;
 #endif
 
 static struct board_info board_info;
+static struct board_info display_board_info;
 
 static tegra_dc_bl_output cardhu_bl_output_measured = {
 	0, 1, 2, 3, 4, 5, 6, 7,
@@ -210,7 +226,13 @@ static int cardhu_backlight_notify(struct device *unused, int brightness)
 	if (brightness > 255) {
 		pr_info("Error: Brightness > 255!\n");
 	} else {
-		brightness = bl_output[brightness];
+		/* This value depends on the panel.
+		  Current 19X12 panel with PM313 gets
+		  full brightness when the output is 0. */
+		if (display_board_info.board_id == BOARD_DISPLAY_PM313)
+			brightness = 255 - bl_output[brightness];
+		else
+			brightness = bl_output[brightness];
 	}
 
 	return brightness;
@@ -267,11 +289,24 @@ static int cardhu_panel_enable(void)
 		else
 			regulator_enable(cardhu_lvds_vdd_panel);
 	}
-	if ((board_info.board_id == BOARD_PM269) ||
-		(board_info.board_id == BOARD_E1257) ||
-		(board_info.board_id == BOARD_PM305) ||
-		(board_info.board_id == BOARD_PM311))
-		gpio_set_value(pm269_lvds_shutdown, 1);
+
+	if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
+		/* lvds configuration */
+		gpio_set_value(pm313_R_FDE, 1);
+		gpio_set_value(pm313_R_FB, 1);
+		gpio_set_value(pm313_MODE0, 1);
+		gpio_set_value(pm313_MODE1, 0);
+
+		/* FIXME : it may require more or less delay for latching
+		  values correctly before enabling RGB2LVDS */
+		mdelay(100);
+		gpio_set_value(pm313_lvds_shutdown, 1);
+	} else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
+			board_info.board_id == BOARD_PM269) ||
+			(board_info.board_id == BOARD_E1257) ||
+			(board_info.board_id == BOARD_PM305) ||
+			(board_info.board_id == BOARD_PM311))
+		gpio_set_value(e1247_pm269_lvds_shutdown, 1);
 	else
 		gpio_set_value(cardhu_lvds_shutdown, 1);
 
@@ -291,13 +326,18 @@ static int cardhu_panel_disable(void)
 	regulator_disable(cardhu_lvds_vdd_panel);
 	regulator_put(cardhu_lvds_vdd_panel);
 	cardhu_lvds_vdd_panel= NULL;
-	if ((board_info.board_id == BOARD_PM269) ||
-		(board_info.board_id == BOARD_E1257) ||
-		(board_info.board_id == BOARD_PM305) ||
-		(board_info.board_id == BOARD_PM311))
-		gpio_set_value(pm269_lvds_shutdown, 0);
-	else
+
+	if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
+		gpio_set_value(pm313_lvds_shutdown, 0);
+	} else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
+			board_info.board_id == BOARD_PM269) ||
+			(board_info.board_id == BOARD_E1257) ||
+			(board_info.board_id == BOARD_PM305) ||
+			(board_info.board_id == BOARD_PM311)) {
+		gpio_set_value(e1247_pm269_lvds_shutdown, 0);
+	} else {
 		gpio_set_value(cardhu_lvds_shutdown, 0);
+	}
 	return 0;
 }
 #endif
@@ -446,6 +486,22 @@ static struct resource cardhu_disp2_resources[] = {
 #endif
 
 #ifndef CONFIG_TEGRA_CARDHU_DSI
+static struct tegra_dc_mode panel_19X12_modes[] = {
+	{
+		.pclk = 154000000,
+		.h_ref_to_sync = 11,
+		.v_ref_to_sync = 1,
+		.h_sync_width = 32,
+		.v_sync_width = 6,
+		.h_back_porch = 80,
+		.v_back_porch = 26,
+		.h_active = 1920,
+		.v_active = 1200,
+		.h_front_porch = 48,
+		.v_front_porch = 3,
+	},
+};
+
 static struct tegra_dc_mode cardhu_panel_modes[] = {
 	{
 		/* 1366x768@60Hz */
@@ -985,6 +1041,7 @@ int __init cardhu_panel_init(void)
 	struct resource __maybe_unused *res;
 
 	tegra_get_board_info(&board_info);
+	tegra_get_display_board_info(&display_board_info);
 
 	cardhu_carveouts[1].base = tegra_carveout_start;
 	cardhu_carveouts[1].size = tegra_carveout_size;
@@ -997,13 +1054,52 @@ int __init cardhu_panel_init(void)
 		cardhu_disp1_out.n_modes = ARRAY_SIZE(cardhu_panel_modes_55hz);
 	}
 
-	if ((board_info.board_id == BOARD_PM269) ||
-		(board_info.board_id == BOARD_E1257) ||
-		(board_info.board_id == BOARD_PM305) ||
-		(board_info.board_id == BOARD_PM311)) {
-		gpio_request(pm269_lvds_shutdown, "lvds_shutdown");
-		gpio_direction_output(pm269_lvds_shutdown, 1);
-		tegra_gpio_enable(pm269_lvds_shutdown);
+	if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
+		/* lvds configuration */
+		err = gpio_request(pm313_R_FDE, "R_FDE");
+		err |= gpio_direction_output(pm313_R_FDE, 1);
+		tegra_gpio_enable(pm313_R_FDE);
+
+		err |= gpio_request(pm313_R_FB, "R_FB");
+		err |= gpio_direction_output(pm313_R_FB, 1);
+		tegra_gpio_enable(pm313_R_FB);
+
+		err |= gpio_request(pm313_MODE0, "MODE0");
+		err |= gpio_direction_output(pm313_MODE0, 1);
+		tegra_gpio_enable(pm313_MODE0);
+
+		err |= gpio_request(pm313_MODE1, "MODE1");
+		err |= gpio_direction_output(pm313_MODE1, 0);
+		tegra_gpio_enable(pm313_MODE1);
+
+		err = gpio_request(pm313_lvds_shutdown, "lvds_shutdown");
+		/* free ride provided by bootloader */
+		err |= gpio_direction_output(pm313_lvds_shutdown, 1);
+		tegra_gpio_enable(pm313_lvds_shutdown);
+
+		if (err)
+			printk(KERN_ERR "ERROR(s) in LVDS configuration\n");
+#if defined(PM313_LVDS_PANEL_19X12_18BPP)
+		cardhu_disp1_out.modes = panel_19X12_modes;
+		cardhu_disp1_out.n_modes = ARRAY_SIZE(panel_19X12_modes);
+		cardhu_disp1_out.parent_clk = "pll_d_out0";
+		cardhu_disp1_out.depth = 18;
+
+		cardhu_fb_data.xres = 1920;
+		cardhu_fb_data.yres = 1200;
+
+		cardhu_disp2_out.parent_clk = "pll_d2_out0";
+		cardhu_hdmi_fb_data.xres = 1920;
+		cardhu_hdmi_fb_data.yres = 1200;
+#endif
+	} else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
+				board_info.board_id == BOARD_PM269) ||
+				(board_info.board_id == BOARD_E1257) ||
+				(board_info.board_id == BOARD_PM305) ||
+				(board_info.board_id == BOARD_PM311)) {
+		gpio_request(e1247_pm269_lvds_shutdown, "lvds_shutdown");
+		gpio_direction_output(e1247_pm269_lvds_shutdown, 1);
+		tegra_gpio_enable(e1247_pm269_lvds_shutdown);
 	} else {
 		gpio_request(cardhu_lvds_shutdown, "lvds_shutdown");
 		gpio_direction_output(cardhu_lvds_shutdown, 1);
diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c
index cb3344d4e002..c07d8d5be280 100644
--- a/arch/arm/mach-tegra/board-cardhu-pinmux.c
+++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c
@@ -213,9 +213,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = {
 	DEFAULT_PINMUX(LCD_SDIN,        DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_SDOUT,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_WR_N,        DISPLAYA,        NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(LCD_CS0_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_DC0,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(LCD_SCK,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_PWR0,        DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_PCLK,        DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_DE,          DISPLAYA,        NORMAL,    NORMAL,     INPUT),
@@ -245,8 +243,6 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = {
 	DEFAULT_PINMUX(LCD_D21,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_D22,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_D23,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(LCD_CS1_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(LCD_M1,          DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(LCD_DC1,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(CRT_HSYNC,       CRT,             NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(CRT_VSYNC,       CRT,             NORMAL,    NORMAL,     OUTPUT),
@@ -318,9 +314,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = {
 	DEFAULT_PINMUX(GMI_OE_N,        NAND,            NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(GMI_DQS,         NAND,            NORMAL,    NORMAL,     INPUT),
 #else
-	DEFAULT_PINMUX(GMI_CS2_N,       RSVD1,           PULL_UP,   NORMAL,     INPUT), /* EN_VDD_BL1 */
 	DEFAULT_PINMUX(GMI_AD8,         PWM0,            NORMAL,    NORMAL,     OUTPUT), /* LCD1_BL_PWM */
-	DEFAULT_PINMUX(GMI_AD10,        NAND,            NORMAL,    NORMAL,     OUTPUT), /* LCD1_BL_EN */
 #endif
 	DEFAULT_PINMUX(GMI_A16,         SPI4,            NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(GMI_A17,         SPI4,            NORMAL,    NORMAL,     INPUT),
@@ -424,12 +418,20 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = {
 static __initdata struct tegra_pingroup_config cardhu_pinmux_e118x[] = {
 	/* Power rails GPIO */
 	DEFAULT_PINMUX(SPI2_SCK,        SPI2,            NORMAL,    NORMAL,     INPUT),
-	DEFAULT_PINMUX(GMI_CS2_N,       NAND,            NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(GMI_RST_N,       RSVD3,           PULL_UP,   TRISTATE,   INPUT),
 	DEFAULT_PINMUX(GMI_AD15,        NAND,            PULL_UP,   TRISTATE,   INPUT),
 };
 
 static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu[] = {
+	DEFAULT_PINMUX(LCD_CS0_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_SCK,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_CS1_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_M1,          DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+
+	DEFAULT_PINMUX(GMI_CS2_N,       RSVD1,           PULL_UP,   NORMAL,     INPUT),
+	DEFAULT_PINMUX(GMI_AD8,         PWM0,            NORMAL,    NORMAL,     OUTPUT),
+	DEFAULT_PINMUX(GMI_AD10,        NAND,            NORMAL,    NORMAL,     OUTPUT),
+
 	/* Power rails GPIO */
 	DEFAULT_PINMUX(GMI_CS2_N,       NAND,            NORMAL,    NORMAL,     OUTPUT),
 	DEFAULT_PINMUX(GMI_RST_N,       RSVD3,           PULL_UP,   TRISTATE,   INPUT),
@@ -442,6 +444,15 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu[] = {
 };
 
 static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu_a03[] = {
+	DEFAULT_PINMUX(LCD_CS0_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_SCK,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_CS1_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_M1,          DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+
+	DEFAULT_PINMUX(GMI_CS2_N,       RSVD1,           PULL_UP,   NORMAL,     INPUT),
+	DEFAULT_PINMUX(GMI_AD8,         PWM0,            NORMAL,    NORMAL,     OUTPUT),
+	DEFAULT_PINMUX(GMI_AD10,        NAND,            NORMAL,    NORMAL,     OUTPUT),
+
 	/* Power rails GPIO */
 	DEFAULT_PINMUX(PEX_L0_PRSNT_N,  PCIE,            NORMAL,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE,            NORMAL,    NORMAL,     INPUT),
@@ -454,6 +465,15 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_e1291_a04[] = {
 };
 
 static __initdata struct tegra_pingroup_config cardhu_pinmux_e1198[] = {
+	DEFAULT_PINMUX(LCD_CS0_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_SCK,         DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_CS1_N,       DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+	DEFAULT_PINMUX(LCD_M1,          DISPLAYA,        NORMAL,    NORMAL,     INPUT),
+
+	DEFAULT_PINMUX(GMI_CS2_N,       RSVD1,           PULL_UP,   NORMAL,     INPUT),
+	DEFAULT_PINMUX(GMI_AD8,         PWM0,            NORMAL,    NORMAL,     OUTPUT),
+	DEFAULT_PINMUX(GMI_AD10,        NAND,            NORMAL,    NORMAL,     OUTPUT),
+
 	/* SPI2 */
 	DEFAULT_PINMUX(SPI2_SCK,        SPI2,            PULL_UP,    NORMAL,     INPUT),
 	DEFAULT_PINMUX(SPI2_MOSI,       SPI2,            PULL_UP,    NORMAL,     INPUT),
@@ -646,19 +666,21 @@ int __init cardhu_pinmux_init(void)
 struct gpio_init_pin_info pin_lpm_cardhu_common[] = {
 	PIN_GPIO_LPM("GMI_CS3_N", TEGRA_GPIO_PK4, 0, 0),
 	PIN_GPIO_LPM("GMI_CS4_N", TEGRA_GPIO_PK2, 1, 0),
-	PIN_GPIO_LPM("GMI_AD9",   TEGRA_GPIO_PH1, 0, 0),
-	PIN_GPIO_LPM("GMI_AD11",  TEGRA_GPIO_PH3, 0, 0),
 	PIN_GPIO_LPM("GMI_CS7",   TEGRA_GPIO_PI6, 1, 0),
 	PIN_GPIO_LPM("GMI_CS0",   TEGRA_GPIO_PJ0, 1, 0),
 	PIN_GPIO_LPM("GMI_CS1",   TEGRA_GPIO_PJ2, 1, 0),
 	PIN_GPIO_LPM("GMI_WP_N",  TEGRA_GPIO_PC7, 1, 0),
 };
 
+/* E1198 without PM313 display board */
+struct gpio_init_pin_info pin_lpm_cardhu_common_wo_pm313[] = {
+	PIN_GPIO_LPM("GMI_AD9",   TEGRA_GPIO_PH1, 0, 0),
+	PIN_GPIO_LPM("GMI_AD11",  TEGRA_GPIO_PH3, 0, 0),
+};
+
 struct gpio_init_pin_info vddio_gmi_pins_pm269[] = {
-	PIN_GPIO_LPM("GMI_CS2",   TEGRA_GPIO_PK3, 1, 0),
 	PIN_GPIO_LPM("GMI_CS3_N", TEGRA_GPIO_PK4, 0, 0),
 	PIN_GPIO_LPM("GMI_CS4_N", TEGRA_GPIO_PK2, 1, 0),
-	PIN_GPIO_LPM("GMI_AD9",   TEGRA_GPIO_PH1, 0, 0),
 	PIN_GPIO_LPM("GMI_CS7",   TEGRA_GPIO_PI6, 1, 0),
 	PIN_GPIO_LPM("GMI_CS0",   TEGRA_GPIO_PJ0, 1, 0),
 	PIN_GPIO_LPM("GMI_CS1",   TEGRA_GPIO_PJ2, 1, 0),
@@ -669,6 +691,12 @@ struct gpio_init_pin_info vddio_gmi_pins_pm269[] = {
 	PIN_GPIO_LPM("GMI_A19",   TEGRA_GPIO_PK7, 0, 0),
 };
 
+/* PM269 without PM313 display board */
+struct gpio_init_pin_info vddio_gmi_pins_pm269_wo_pm313[] = {
+	PIN_GPIO_LPM("GMI_CS2",   TEGRA_GPIO_PK3, 1, 0),
+	PIN_GPIO_LPM("GMI_AD9",   TEGRA_GPIO_PH1, 0, 0),
+};
+
 static void set_unused_pin_gpio(struct gpio_init_pin_info *lpm_pin_info,
 		int list_count)
 {
@@ -707,18 +735,33 @@ static void set_unused_pin_gpio(struct gpio_init_pin_info *lpm_pin_info,
 int __init cardhu_pins_state_init(void)
 {
 	struct board_info board_info;
+	struct board_info display_board_info;
 
 	tegra_get_board_info(&board_info);
+	tegra_get_display_board_info(&display_board_info);
 	if ((board_info.board_id == BOARD_E1291) ||
-		(board_info.board_id == BOARD_E1198))
+		(board_info.board_id == BOARD_E1198)) {
 			set_unused_pin_gpio(&pin_lpm_cardhu_common[0],
 					ARRAY_SIZE(pin_lpm_cardhu_common));
 
+			if (display_board_info.board_id != BOARD_DISPLAY_PM313) {
+				set_unused_pin_gpio(&pin_lpm_cardhu_common_wo_pm313[0],
+						ARRAY_SIZE(pin_lpm_cardhu_common_wo_pm313));
+			}
+	}
+
 	if ((board_info.board_id == BOARD_PM269) ||
 		(board_info.board_id == BOARD_E1257) ||
 		(board_info.board_id == BOARD_PM305) ||
-		(board_info.board_id == BOARD_PM311))
-		set_unused_pin_gpio(&vddio_gmi_pins_pm269[0],
+		(board_info.board_id == BOARD_PM311)) {
+			set_unused_pin_gpio(&vddio_gmi_pins_pm269[0],
 				ARRAY_SIZE(vddio_gmi_pins_pm269));
+
+			if (display_board_info.board_id != BOARD_DISPLAY_PM313) {
+				set_unused_pin_gpio(&vddio_gmi_pins_pm269_wo_pm313[0],
+						ARRAY_SIZE(vddio_gmi_pins_pm269_wo_pm313));
+			}
+	}
+
 	return 0;
 }
diff --git a/arch/arm/mach-tegra/board-cardhu-power.c b/arch/arm/mach-tegra/board-cardhu-power.c
index 82b627ef26eb..7ccd6ff45e58 100644
--- a/arch/arm/mach-tegra/board-cardhu-power.c
+++ b/arch/arm/mach-tegra/board-cardhu-power.c
@@ -761,6 +761,12 @@ GREG_INIT(21, en_vdd_bl2_a03,	en_vdd_bl2,	NULL,		0,      0,      TEGRA_GPIO_PDD0
 
 GREG_INIT(22, en_vbrtr,		en_vbrtr,	"vdd_3v3_devices",	0,      0,      PMU_TCA6416_GPIO_PORT12,	false,	0,	0,	0,	0);
 
+/* PM313 display board specific */
+GREG_INIT(4, en_vdd_bl_pm313,       en_vdd_bl,      NULL,
+		0,      0,      TEGRA_GPIO_PK3, false,  1,  0,  0,  0);
+GREG_INIT(6, en_vdd_pnl1_pm313,     en_vdd_pnl1,        "vdd_3v3_devices",
+		0,      0,      TEGRA_GPIO_PH3, false,  1,  0,  0,  0);
+
 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
 
 #define COMMON_GPIO_REG \
@@ -797,10 +803,8 @@ GREG_INIT(22, en_vbrtr,		en_vbrtr,	"vdd_3v3_devices",	0,      0,      PMU_TCA641
 	ADD_GPIO_REG(en_5v_cp),			\
 	ADD_GPIO_REG(en_5v0),			\
 	ADD_GPIO_REG(en_ddr),			\
-	ADD_GPIO_REG(en_vdd_bl_pm269),		\
 	ADD_GPIO_REG(en_3v3_sys),		\
 	ADD_GPIO_REG(en_3v3_modem),		\
-	ADD_GPIO_REG(en_vdd_pnl1_pm269),		\
 	ADD_GPIO_REG(cam1_ldo_en),		\
 	ADD_GPIO_REG(cam2_ldo_en),		\
 	ADD_GPIO_REG(cam3_ldo_en),		\
@@ -814,17 +818,36 @@ GREG_INIT(22, en_vbrtr,		en_vbrtr,	"vdd_3v3_devices",	0,      0,      PMU_TCA641
 	ADD_GPIO_REG(en_usb3_vbus_oc_e118x),	\
 	ADD_GPIO_REG(en_vddio_vid_oc_pm269),
 
-#define E118x_GPIO_REG	\
-	ADD_GPIO_REG(en_vdd_bl),		\
+#define E1247_DISPLAY_GPIO_REG		\
+	ADD_GPIO_REG(en_vdd_bl_pm269),	\
+	ADD_GPIO_REG(en_vdd_pnl1_pm269),
+
+#define PM313_DISPLAY_GPIO_REG		\
+	ADD_GPIO_REG(en_vdd_bl_pm313),	\
+	ADD_GPIO_REG(en_vdd_pnl1_pm313),
+
+#define E118x_GPIO_REG				\
+	ADD_GPIO_REG(en_5v_cp),			\
+	ADD_GPIO_REG(en_5v0),			\
+	ADD_GPIO_REG(en_ddr),			\
+	ADD_GPIO_REG(en_3v3_sys),		\
+	ADD_GPIO_REG(en_3v3_modem),		\
+	ADD_GPIO_REG(cam3_ldo_en),		\
+	ADD_GPIO_REG(en_vdd_com),		\
+	ADD_GPIO_REG(en_3v3_fuse),		\
+	ADD_GPIO_REG(en_3v3_emmc),		\
+	ADD_GPIO_REG(en_vdd_sdmmc1),		\
+	ADD_GPIO_REG(en_3v3_pex_hvdd),		\
+	ADD_GPIO_REG(en_1v8_cam),		\
 	ADD_GPIO_REG(dis_5v_switch_e118x),	\
 	ADD_GPIO_REG(en_usb1_vbus_oc_e118x),	\
 	ADD_GPIO_REG(en_usb3_vbus_oc_e118x),	\
-	ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
+	ADD_GPIO_REG(en_vddio_vid_oc_e118x),	\
 	ADD_GPIO_REG(en_vbrtr),
 
-#define E1198_GPIO_REG	\
-	ADD_GPIO_REG(en_vddio_vid_oc),		\
-	ADD_GPIO_REG(cam1_ldo_en),		\
+#define E1198_GPIO_REG			\
+	ADD_GPIO_REG(en_vddio_vid_oc),	\
+	ADD_GPIO_REG(cam1_ldo_en),	\
 	ADD_GPIO_REG(cam2_ldo_en),
 
 #define E1291_1198_A00_GPIO_REG	\
@@ -840,8 +863,14 @@ GREG_INIT(22, en_vbrtr,		en_vbrtr,	"vdd_3v3_devices",	0,      0,      PMU_TCA641
 
 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
-	COMMON_GPIO_REG
 	E118x_GPIO_REG
+	E1247_DISPLAY_GPIO_REG
+};
+
+/* Gpio switch regulator platform data  for E1186/E1187/E1256*/
+static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x_pm313[] = {
+	E118x_GPIO_REG
+	PM313_DISPLAY_GPIO_REG
 };
 
 /* Gpio switch regulator platform data for E1198 and E1291*/
@@ -877,6 +906,13 @@ static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_a02[] = {
 /* Gpio switch regulator platform data for PM269*/
 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
 	PM269_GPIO_REG
+	E1247_DISPLAY_GPIO_REG
+};
+
+/* Gpio switch regulator platform data for PM269*/
+static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269_pm313[] = {
+	PM269_GPIO_REG
+	PM313_DISPLAY_GPIO_REG
 };
 
 /* Gpio switch regulator platform data for E1291 A03*/
@@ -907,7 +943,11 @@ int __init cardhu_gpio_switch_regulator_init(void)
 {
 	int i;
 	struct board_info board_info;
+	struct board_info display_board_info;
+
 	tegra_get_board_info(&board_info);
+	tegra_get_display_board_info(&display_board_info);
+
 	switch (board_info.board_id) {
 	case BOARD_E1198:
 		if (board_info.fab <= BOARD_FAB_A01) {
@@ -942,10 +982,22 @@ int __init cardhu_gpio_switch_regulator_init(void)
 	case BOARD_E1257:
 		gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
 		gswitch_pdata.subdevs = gswitch_subdevs_pm269;
+		if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
+			gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269_pm313);
+			gswitch_pdata.subdevs = gswitch_subdevs_pm269_pm313;
+		} else {
+			gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
+			gswitch_pdata.subdevs = gswitch_subdevs_pm269;
+		}
 		break;
 	default:
-		gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
-		gswitch_pdata.subdevs = gswitch_subdevs_e118x;
+		if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
+			gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x_pm313);
+			gswitch_pdata.subdevs = gswitch_subdevs_e118x_pm313;
+		} else {
+			gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
+			gswitch_pdata.subdevs = gswitch_subdevs_e118x;
+		}
 		break;
 	}
 
diff --git a/arch/arm/mach-tegra/board-cardhu-sdhci.c b/arch/arm/mach-tegra/board-cardhu-sdhci.c
index 10441c95d341..0c4bffb3d87b 100644
--- a/arch/arm/mach-tegra/board-cardhu-sdhci.c
+++ b/arch/arm/mach-tegra/board-cardhu-sdhci.c
@@ -34,7 +34,7 @@
 
 #define CARDHU_SD_CD TEGRA_GPIO_PI5
 #define CARDHU_SD_WP TEGRA_GPIO_PT3
-#define PM269_SD_WP TEGRA_GPIO_PZ4
+#define PM269_SD_WP -1
 
 static struct resource sdhci_resource0[] = {
 	[0] = {
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c
index 7933cdf45284..d0780689ba69 100644
--- a/arch/arm/mach-tegra/board-cardhu.c
+++ b/arch/arm/mach-tegra/board-cardhu.c
@@ -893,7 +893,8 @@ static void __init tegra_cardhu_init(void)
 static void __init tegra_cardhu_reserve(void)
 {
 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
-	tegra_reserve(0, SZ_8M, SZ_8M);
+	/* support 1920X1200 with 24bpp */
+	tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
 #else
 	tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
 #endif
diff --git a/arch/arm/mach-tegra/board-cardhu.h b/arch/arm/mach-tegra/board-cardhu.h
index cda3bb38a4e9..90901b7b0711 100644
--- a/arch/arm/mach-tegra/board-cardhu.h
+++ b/arch/arm/mach-tegra/board-cardhu.h
@@ -67,6 +67,9 @@
 #define BOARD_FAB_A04			0x4
 #define BOARD_FAB_A05			0x5
 
+/* Display Board ID */
+#define BOARD_DISPLAY_PM313		0x030D
+#define BOARD_DISPLAY_E1247		0x0C2F
 
 /* External peripheral act as gpio */
 /* TPS6591x GPIOs */
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 0b480c4a6b73..b8ab1533bbab 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -94,6 +94,7 @@ enum audio_codec_type {
 
 void tegra_get_board_info(struct board_info *);
 void tegra_get_pmu_board_info(struct board_info *bi);
+void tegra_get_display_board_info(struct board_info *bi);
 
 int get_core_edp(void);
 enum panel_type get_panel_type(void);
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 61452f8cfae8..e118931dcdf0 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -89,6 +89,7 @@ bool tegra_lp0_vec_relocate;
 unsigned long tegra_grhost_aperture = ~0ul;
 static   bool is_tegra_debug_uart_hsport;
 static struct board_info pmu_board_info;
+static struct board_info display_board_info;
 
 static int pmu_core_edp = 1200;	/* default 1.2V EDP limit */
 static int board_panel_type;
@@ -495,6 +496,24 @@ void tegra_get_pmu_board_info(struct board_info *bi)
 
 __setup("pmuboard=", tegra_pmu_board_info);
 
+static int __init tegra_display_board_info(char *info)
+{
+	char *p = info;
+	display_board_info.board_id = memparse(p, &p);
+	display_board_info.sku = memparse(p+1, &p);
+	display_board_info.fab = memparse(p+1, &p);
+	display_board_info.major_revision = memparse(p+1, &p);
+	display_board_info.minor_revision = memparse(p+1, &p);
+	return 1;
+}
+
+void tegra_get_display_board_info(struct board_info *bi)
+{
+	memcpy(bi, &display_board_info, sizeof(struct board_info));
+}
+
+__setup("displayboard=", tegra_display_board_info);
+
 static int __init tegra_modem_id(char *id)
 {
 	char *p = id;
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index 9a9ddd56be36..b1c441390ce4 100644
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -1308,11 +1308,22 @@ void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk)
 	int pclk;
 
 	if (dc->out->type == TEGRA_DC_OUT_RGB) {
+		unsigned long rate;
 		struct clk *parent_clk =
 			clk_get_sys(NULL, dc->out->parent_clk ? : "pll_p");
 
 		if (clk_get_parent(clk) != parent_clk)
 			clk_set_parent(clk, parent_clk);
+
+		if (parent_clk != clk_get_sys(NULL, "pll_p")) {
+			struct clk *base_clk = clk_get_parent(parent_clk);
+
+			/* Assuming either pll_d or pll_d2 is used */
+			rate = dc->mode.pclk * 2;
+
+			if (rate != clk_get_rate(base_clk))
+				clk_set_rate(base_clk, rate);
+		}
 	}
 
 	if (dc->out->type == TEGRA_DC_OUT_HDMI) {