ARM: tegra: pm: save/restore ahb bus registers

Bug 814896, 820602

Reviewed-on: http://git-master/r/35948
(cherry picked from commit 4b9158b73bd5b5ae9b1059d31e062362d4732064)
Change-Id: I56c9f51bc1d6cbf455795a65d702e62ea5be1522
Reviewed-on: http://git-master/r/36676
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

1 files changed, 110 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c
index d87ce541f31e..33e94482c369 100644
--- a/arch/arm/mach-tegra/suspend.c
+++ b/arch/arm/mach-tegra/suspend.c
@@ -815,6 +815,114 @@ static void tegra_debug_uart_resume(void)
 #define MC_SECURITY_SIZE	0x70
 #define MC_SECURITY_CFG2	0x7c
 
+#define AHB_ARBITRATION_DISABLE		0x00
+#define AHB_ARBITRATION_PRIORITY_CTRL	0x04
+#define AHB_GIZMO_AHB_MEM		0x0c
+#define AHB_GIZMO_APB_DMA		0x10
+#define AHB_GIZMO_IDE			0x18
+#define AHB_GIZMO_USB			0x1c
+#define AHB_GIZMO_AHB_XBAR_BRIDGE	0x20
+#define AHB_GIZMO_CPU_AHB_BRIDGE	0x24
+#define AHB_GIZMO_COP_AHB_BRIDGE	0x28
+#define AHB_GIZMO_XBAR_APB_CTLR		0x2c
+#define AHB_GIZMO_VCP_AHB_BRIDGE	0x30
+#define AHB_GIZMO_NAND			0x3c
+#define AHB_GIZMO_SDMMC4		0x44
+#define AHB_GIZMO_XIO			0x48
+#define AHB_GIZMO_BSEV			0x60
+#define AHB_GIZMO_BSEA			0x70
+#define AHB_GIZMO_NOR			0x74
+#define AHB_GIZMO_USB2			0x78
+#define AHB_GIZMO_USB3			0x7c
+#define AHB_GIZMO_SDMMC1		0x80
+#define AHB_GIZMO_SDMMC2		0x84
+#define AHB_GIZMO_SDMMC3		0x88
+#define AHB_MEM_PREFETCH_CFG_X		0xd8
+#define AHB_ARBITRATION_XBAR_CTRL	0xdc
+#define AHB_MEM_PREFETCH_CFG3		0xe0
+#define AHB_MEM_PREFETCH_CFG4		0xe4
+#define AHB_MEM_PREFETCH_CFG1		0xec
+#define AHB_MEM_PREFETCH_CFG2		0xf0
+#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID	0xf8
+
+static inline unsigned long gizmo_readl(unsigned long offset)
+{
+	return readl(IO_TO_VIRT(TEGRA_AHB_GIZMO_BASE + offset));
+}
+
+static inline void gizmo_writel(unsigned long value, unsigned long offset)
+{
+	writel(value, IO_TO_VIRT(TEGRA_AHB_GIZMO_BASE + offset));
+}
+
+static u32 ahb_gizmo[29];
+
+void tegra_ahbgizmo_suspend(void)
+{
+	ahb_gizmo[0] = gizmo_readl(AHB_ARBITRATION_DISABLE);
+	ahb_gizmo[1] = gizmo_readl(AHB_ARBITRATION_PRIORITY_CTRL);
+	ahb_gizmo[2] = gizmo_readl(AHB_GIZMO_AHB_MEM);
+	ahb_gizmo[3] = gizmo_readl(AHB_GIZMO_APB_DMA);
+	ahb_gizmo[4] = gizmo_readl(AHB_GIZMO_IDE);
+	ahb_gizmo[5] = gizmo_readl(AHB_GIZMO_USB);
+	ahb_gizmo[6] = gizmo_readl(AHB_GIZMO_AHB_XBAR_BRIDGE);
+	ahb_gizmo[7] = gizmo_readl(AHB_GIZMO_CPU_AHB_BRIDGE);
+	ahb_gizmo[8] = gizmo_readl(AHB_GIZMO_COP_AHB_BRIDGE);
+	ahb_gizmo[9] = gizmo_readl(AHB_GIZMO_XBAR_APB_CTLR);
+	ahb_gizmo[10] = gizmo_readl(AHB_GIZMO_VCP_AHB_BRIDGE);
+	ahb_gizmo[11] = gizmo_readl(AHB_GIZMO_NAND);
+	ahb_gizmo[12] = gizmo_readl(AHB_GIZMO_SDMMC4);
+	ahb_gizmo[13] = gizmo_readl(AHB_GIZMO_XIO);
+	ahb_gizmo[14] = gizmo_readl(AHB_GIZMO_BSEV);
+	ahb_gizmo[15] = gizmo_readl(AHB_GIZMO_BSEA);
+	ahb_gizmo[16] = gizmo_readl(AHB_GIZMO_NOR);
+	ahb_gizmo[17] = gizmo_readl(AHB_GIZMO_USB2);
+	ahb_gizmo[18] = gizmo_readl(AHB_GIZMO_USB3);
+	ahb_gizmo[19] = gizmo_readl(AHB_GIZMO_SDMMC1);
+	ahb_gizmo[20] = gizmo_readl(AHB_GIZMO_SDMMC2);
+	ahb_gizmo[21] = gizmo_readl(AHB_GIZMO_SDMMC3);
+	ahb_gizmo[22] = gizmo_readl(AHB_MEM_PREFETCH_CFG_X);
+	ahb_gizmo[23] = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL);
+	ahb_gizmo[24] = gizmo_readl(AHB_MEM_PREFETCH_CFG3);
+	ahb_gizmo[25] = gizmo_readl(AHB_MEM_PREFETCH_CFG4);
+	ahb_gizmo[26] = gizmo_readl(AHB_MEM_PREFETCH_CFG1);
+	ahb_gizmo[27] = gizmo_readl(AHB_MEM_PREFETCH_CFG2);
+	ahb_gizmo[28] = gizmo_readl(AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID);
+}
+
+void tegra_ahbgizmo_resume(void)
+{
+	gizmo_writel(ahb_gizmo[0], AHB_ARBITRATION_DISABLE);
+	gizmo_writel(ahb_gizmo[1], AHB_ARBITRATION_PRIORITY_CTRL);
+	gizmo_writel(ahb_gizmo[2], AHB_GIZMO_AHB_MEM);
+	gizmo_writel(ahb_gizmo[3], AHB_GIZMO_APB_DMA);
+	gizmo_writel(ahb_gizmo[4], AHB_GIZMO_IDE);
+	gizmo_writel(ahb_gizmo[5], AHB_GIZMO_USB);
+	gizmo_writel(ahb_gizmo[6], AHB_GIZMO_AHB_XBAR_BRIDGE);
+	gizmo_writel(ahb_gizmo[7], AHB_GIZMO_CPU_AHB_BRIDGE);
+	gizmo_writel(ahb_gizmo[8], AHB_GIZMO_COP_AHB_BRIDGE);
+	gizmo_writel(ahb_gizmo[9], AHB_GIZMO_XBAR_APB_CTLR);
+	gizmo_writel(ahb_gizmo[10],AHB_GIZMO_VCP_AHB_BRIDGE);
+	gizmo_writel(ahb_gizmo[11],AHB_GIZMO_NAND);
+	gizmo_writel(ahb_gizmo[12],AHB_GIZMO_SDMMC4);
+	gizmo_writel(ahb_gizmo[13],AHB_GIZMO_XIO);
+	gizmo_writel(ahb_gizmo[14],AHB_GIZMO_BSEV);
+	gizmo_writel(ahb_gizmo[15],AHB_GIZMO_BSEA);
+	gizmo_writel(ahb_gizmo[16],AHB_GIZMO_NOR);
+	gizmo_writel(ahb_gizmo[17],AHB_GIZMO_USB2);
+	gizmo_writel(ahb_gizmo[18],AHB_GIZMO_USB3);
+	gizmo_writel(ahb_gizmo[19],AHB_GIZMO_SDMMC1);
+	gizmo_writel(ahb_gizmo[20],AHB_GIZMO_SDMMC2);
+	gizmo_writel(ahb_gizmo[21],AHB_GIZMO_SDMMC3);
+	gizmo_writel(ahb_gizmo[22],AHB_MEM_PREFETCH_CFG_X);
+	gizmo_writel(ahb_gizmo[23],AHB_ARBITRATION_XBAR_CTRL);
+	gizmo_writel(ahb_gizmo[24],AHB_MEM_PREFETCH_CFG3);
+	gizmo_writel(ahb_gizmo[25],AHB_MEM_PREFETCH_CFG4);
+	gizmo_writel(ahb_gizmo[26],AHB_MEM_PREFETCH_CFG1);
+	gizmo_writel(ahb_gizmo[27],AHB_MEM_PREFETCH_CFG2);
+	gizmo_writel(ahb_gizmo[28],AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID);
+}
+
 static int tegra_suspend_enter(suspend_state_t state)
 {
 	struct irq_desc *desc;
@@ -848,6 +956,7 @@ static int tegra_suspend_enter(suspend_state_t state)
 		tegra_lp0_cpu_mode(true);
 		tegra_irq_suspend();
 		tegra_dma_suspend();
+		tegra_ahbgizmo_suspend();
 		tegra_debug_uart_suspend();
 		tegra_pinmux_suspend();
 		tegra_timer_suspend();
@@ -900,6 +1009,7 @@ static int tegra_suspend_enter(suspend_state_t state)
 		tegra_timer_resume();
 		tegra_pinmux_resume();
 		tegra_debug_uart_resume();
+		tegra_ahbgizmo_resume();
 		tegra_dma_resume();
 		tegra_irq_resume();
 		tegra_lp0_cpu_mode(false);