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authorAlex Frid <afrid@nvidia.com>2010-03-19 14:22:33 -0700
committerGary King <gking@nvidia.com>2010-03-25 17:48:23 -0800
commita9d0afe8b571a90585dadf04f8dcca0c78abc968 (patch)
tree683a613e12e949080d95f89507494a714c9975d8
parent16addf363aca90a17319c858305aa39b921f228a (diff)
tegra RM: Clipped target pixel frequency to h/w maximum.
Clipped target pixel clock frequency to display h/w maximum, instead of asserting when target is above the limit. It would allow to complete clock configuration if low boundary of tolerance range is below maximum. Change-Id: I5167dd0d680e08dba6511a259425814e712c4b0d Reviewed-on: http://git-master/r/920 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
index c51294f05ddf..f13ef4797306 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
+++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_clock_config.c
@@ -1091,6 +1091,10 @@ Ap15DisplayClockConfigure(
NvRmFreqKHz PixelFreq = TargetFreq;
NvRmFreqKHz SourceClockFreq = NvRmPrivGetClockSourceFreq(NvRmClockSource_ClkM);
+ // Clip target to maximum - we still may be able to configure frequency
+ // within tolearnce range
+ PixelFreq = TargetFreq = NV_MIN(TargetFreq, MaxFreq);
+
/*
* Display clock source selection policy:
* - if MIPI flag is specified - use PLLD, and reconfigure it as necessary