diff options
| author | Pradeep Goudagunta <pgoudagunta@nvidia.com> | 2011-02-02 12:10:55 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-02-03 19:07:37 -0800 |
| commit | 2ad78027c3089bc68326d645d6c208182a526211 (patch) | |
| tree | 5d62ce770b1506408528a70aa705c72acdf6b395 | |
| parent | 70c271da73807481a2a6405b63be30071b244c83 (diff) | |
arm: serial: tegra: add PORT_TEGRA port type
added new entry for PORT_TEGRA in serial8250 driver and updated
flags and type of debug uart.
Bug : 782543
Change-Id: I3e6c59f7a24731e92bd48197c6b1b22acdba8a8f
Reviewed-on: http://git-master/r/17995
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Shail Dave <sdave@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board-ventana.c | 3 | ||||
| -rw-r--r-- | drivers/serial/8250.c | 11 | ||||
| -rw-r--r-- | include/linux/serial_core.h | 3 |
3 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c index 281883145dd0..c34186871145 100644 --- a/arch/arm/mach-tegra/board-ventana.c +++ b/arch/arm/mach-tegra/board-ventana.c @@ -86,7 +86,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .membase = IO_ADDRESS(TEGRA_UARTD_BASE), .mapbase = TEGRA_UARTD_BASE, .irq = INT_UARTD, - .flags = UPF_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, .iotype = UPIO_MEM, .regshift = 2, .uartclk = 216000000, diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index 24110f6f61e0..0243be5bded1 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -307,6 +307,14 @@ static const struct serial8250_config uart_config[] = { .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, .flags = UART_CAP_FIFO | UART_CAP_AFE, }, + [PORT_TEGRA] = { + .name = "Tegra", + .fifo_size = 32, + .tx_loadsz = 8, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_01 | + UART_FCR_R_TRIG_01, + .flags = UART_CAP_FIFO, + }, }; #if defined(CONFIG_MIPS_ALCHEMY) @@ -2158,6 +2166,9 @@ dont_test_tx_en: * anyway, so we don't enable them here. */ up->ier = UART_IER_RLSI | UART_IER_RDI; + /* Use the receive timeout interrupt for tegra port*/ + if (up->port.type == PORT_TEGRA) + up->ier |= UART_IER_RTOIE; serial_outp(up, UART_IER, up->ier); if (up->port.flags & UPF_FOURPORT) { diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 7b8a09e2ec7f..bb76e8c12d29 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -45,7 +45,8 @@ #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ -#define PORT_MAX_8250 19 /* max port ID */ +#define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ +#define PORT_MAX_8250 20 /* max port ID */ /* * ARM specific type numbers. These are not currently guaranteed |