diff options
author | Christian Hemp <c.hemp@phytec.de> | 2013-08-01 08:17:44 +0200 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2013-11-07 12:19:35 -0500 |
commit | 4c8105e21478f80c7dda3c85ecd95761802761b7 (patch) | |
tree | 74a6169627919356cf4dca7a1ba29e081aad97b6 | |
parent | 5b5a39005be0ce14428aa19ea37dd2d54cb3209f (diff) |
imx6: pcie: clock: remove sata clock from pcie tree
On some modules SATA don't work if pcie disable the SATA clock.
Remove the SATA clock from pcie clock tree and enable SATA clock before the
pcie clock.
PCIe needs the SATA clock:
/*
* Enable SATA ref clock.
* PCIe needs both sides to have the same source of refernce clock,
* The SATA reference clock is taken out to link partner.
*/
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
-rw-r--r-- | arch/arm/mach-mx6/clock.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx6/pcie.c | 10 |
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 136d6af1be7d..5df534e3e2d2 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -4866,7 +4866,7 @@ static struct clk pcie_clk[] = { .disable = _clk_pcie_disable, .enable_reg = MXC_CCM_CCGR4, .enable_shift = MXC_CCM_CCGRx_CG0_OFFSET, - .secondary = &pcie_clk[1], + .secondary = &pcie_clk[2], .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, }, { diff --git a/arch/arm/mach-mx6/pcie.c b/arch/arm/mach-mx6/pcie.c index c4e8f7d922c9..154066e2fd3a 100644 --- a/arch/arm/mach-mx6/pcie.c +++ b/arch/arm/mach-mx6/pcie.c @@ -690,6 +690,7 @@ static void change_field(int *in, int start, int end, int val) static void imx_pcie_enable_controller(struct device *dev) { struct clk *pcie_clk; + struct clk *sata_clk; struct imx_pcie_platform_data *pdata = dev->platform_data; /* Enable PCIE power */ @@ -700,6 +701,15 @@ static void imx_pcie_enable_controller(struct device *dev) imx_pcie_clrset(IOMUXC_GPR1_TEST_POWERDOWN, 0 << 18, IOMUXC_GPR1); + sata_clk = clk_get(NULL, "imx_sata_clk"); + if (IS_ERR(sata_clk)) + pr_err("no sata clock.\n"); + + if (clk_enable(sata_clk)) { + pr_err("can't enable sata clock.\n"); + clk_put(sata_clk); + } + /* enable the clks */ pcie_clk = clk_get(NULL, "pcie_clk"); if (IS_ERR(pcie_clk)) |