[Blackfin] arch: detect the memory available in the system on the fly by default

detect the memory available in the system on the fly by default
rather than forcing people to set this manually in the kconfig

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

4 files changed, 67 insertions, 17 deletions

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 308bbe291d8f..75bceee9b9a5 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -294,6 +294,11 @@ config BFIN_KERNEL_CLOCK
 	  are also not changed, and the Bootloader does 100% of the hardware
 	  configuration.
 
+config MEM_SIZE
+	int "SDRAM Memory Size in MBytes"
+	depends on BFIN_KERNEL_CLOCK
+	default 64
+
 config MEM_ADD_WIDTH
 	int "Memory Address Width"
 	depends on BFIN_KERNEL_CLOCK
@@ -373,6 +378,14 @@ config SCLK_DIV
 	  This can be between 1 and 15
 	  System Clock = (PLL frequency) / (this setting)
 
+config MAX_MEM_SIZE
+	int "Max SDRAM Memory Size in MBytes"
+	depends on !BFIN_KERNEL_CLOCK && !MPU
+	default 512
+	help
+	  This is the max memory size that the kernel will create CPLB
+	  tables for.  Your system will not be able to handle any more.
+
 #
 # Max & Min Speeds for various Chips
 #
@@ -441,19 +454,6 @@ source kernel/time/Kconfig
 
 comment "Memory Setup"
 
-config MEM_SIZE
-	int "SDRAM Memory Size in MBytes"
-	default  32 if BFIN533_EZKIT
-	default  64 if BFIN527_EZKIT
-	default  64 if BFIN537_STAMP
-	default  64 if BFIN548_EZKIT
-	default  64 if BFIN561_EZKIT
-	default 128 if BFIN533_STAMP
-	default  64 if PNAV10
-	default  32 if H8606_HVSISTEMAS
-	default  64 if BFIN548_BLUETECHNIX_CM
-	default  64 if BFIN532_IP0X
-
 choice
 	prompt "DDR SDRAM Chip Type"
 	depends on (BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index f271f39d5655..917325bfbd84 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -26,6 +26,12 @@
 #include <asm/cplb.h>
 #include <asm/cplbinit.h>
 
+#ifdef CONFIG_MAX_MEM_SIZE
+# define CPLB_MEM CONFIG_MAX_MEM_SIZE
+#else
+# define CPLB_MEM CONFIG_MEM_SIZE
+#endif
+
 /*
 * Number of required data CPLB switchtable entries
 * MEMSIZE / 4 (we mostly install 4M page size CPLBs
@@ -35,7 +41,7 @@
 * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
 * 1 for ASYNC Memory
 */
-#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \
+#define MAX_SWITCH_D_CPLBS (((CPLB_MEM / 4) + 16 + 1 + 1 + 1 \
 				 + ASYNC_MEMORY_CPLB_COVERAGE) * 2)
 
 /*
@@ -46,7 +52,7 @@
 * possibly 1 for L2 Instruction Memory
 * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
 */
-#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2)
+#define MAX_SWITCH_I_CPLBS (((CPLB_MEM / 4) + 12 + 1 + 1 + 1) * 2)
 
 
 u_long icplb_table[MAX_CPLBS + 1];
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index c2f3e73ba25a..d6668328be72 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -649,6 +649,49 @@ static __init void setup_bootmem_allocator(void)
 		BOOTMEM_DEFAULT);
 }
 
+#define EBSZ_TO_MEG(ebsz) \
+({ \
+	int meg = 0; \
+	switch (ebsz & 0xf) { \
+		case 0x1: meg =  16; break; \
+		case 0x3: meg =  32; break; \
+		case 0x5: meg =  64; break; \
+		case 0x7: meg = 128; break; \
+		case 0x9: meg = 256; break; \
+		case 0xb: meg = 512; break; \
+	} \
+	meg; \
+})
+static inline int __init get_mem_size(void)
+{
+#ifdef CONFIG_MEM_SIZE
+	return CONFIG_MEM_SIZE;
+#else
+# if defined(EBIU_SDBCTL)
+#  if defined(BF561_FAMILY)
+	int ret = 0;
+	u32 sdbctl = bfin_read_EBIU_SDBCTL();
+	ret += EBSZ_TO_MEG(sdbctl >>  0);
+	ret += EBSZ_TO_MEG(sdbctl >>  8);
+	ret += EBSZ_TO_MEG(sdbctl >> 16);
+	ret += EBSZ_TO_MEG(sdbctl >> 24);
+	return ret;
+#  else
+	return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
+#  endif
+# elif defined(EBIU_DDRCTL1)
+	switch (bfin_read_EBIU_DDRCTL1() & 0xc0000) {
+		case DEVSZ_64:  return 64;
+		case DEVSZ_128: return 128;
+		case DEVSZ_256: return 256;
+		case DEVSZ_512: return 512;
+		default:        return 0;
+	}
+# endif
+#endif
+	BUG();
+}
+
 void __init setup_arch(char **cmdline_p)
 {
 	unsigned long sclk, cclk;
@@ -669,7 +712,7 @@ void __init setup_arch(char **cmdline_p)
 
 	/* setup memory defaults from the user config */
 	physical_mem_end = 0;
-	_ramend = CONFIG_MEM_SIZE * 1024 * 1024;
+	_ramend = get_mem_size() * 1024 * 1024;
 
 	memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index 2f6ce397780f..caaab49e9cfa 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -54,7 +54,8 @@
 
 #endif /* CONFIG_BFIN_KERNEL_CLOCK */
 
+#ifdef CONFIG_MEM_SIZE
 #if (CONFIG_MEM_SIZE % 4)
 #error "SDRAM mem size must be multible of 4MB"
 #endif
-
+#endif