diff options
author | Ken Chang <kenc@nvidia.com> | 2011-07-19 10:29:33 +0800 |
---|---|---|
committer | Niket Sirsi <nsirsi@nvidia.com> | 2011-07-21 18:05:36 -0700 |
commit | 0cc838ae44178627dfae295487c335055d8dd244 (patch) | |
tree | ce10914a03746394268e181b3bced955a4dab4c8 | |
parent | a64f9b90a8441c80f52ff16af69e523a8a8fc07a (diff) |
ARM: tegra: ventana: support power sequence timing
below variables should be defined according to power sequence
specifications of panels.
- timing between panel power on to lvds singal enable
- timing between lvds signal enable to backlight enable
bug 818959
Change-Id: Idcc6de22178fa455e6e65ea89bbabd8a5eb9e6d9
Reviewed-on: http://git-master/r/41669
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/board-ventana-panel.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-panel.c b/arch/arm/mach-tegra/board-ventana-panel.c index 7cdd499ac93f..b5db74984931 100644 --- a/arch/arm/mach-tegra/board-ventana-panel.c +++ b/arch/arm/mach-tegra/board-ventana-panel.c @@ -44,6 +44,10 @@ #define ventana_hdmi_hpd TEGRA_GPIO_PN7 #define ventana_hdmi_enb TEGRA_GPIO_PV5 +/*panel power on sequence timing*/ +#define ventana_pnl_to_lvds_ms 0 +#define ventana_lvds_to_bl_ms 200 + static struct regulator *ventana_hdmi_reg = NULL; static struct regulator *ventana_hdmi_pll = NULL; @@ -106,7 +110,9 @@ static int ventana_panel_enable(void) regulator_put(reg); gpio_set_value(ventana_pnl_pwr_enb, 1); + mdelay(ventana_pnl_to_lvds_ms); gpio_set_value(ventana_lvds_shutdown, 1); + mdelay(ventana_lvds_to_bl_ms); return 0; } |