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authorRanjani Vaidyanathan <ra5478@freescale.com>2012-04-16 13:30:36 -0500
committerRanjani Vaidyanathan <ra5478@freescale.com>2012-04-16 16:02:59 -0500
commitf1be6f8dc53245bbbf2be811718ec8a8deca4ec9 (patch)
tree1bd95c8bdc3889242da7277bebffaed213c38306
parentdd6dfd484dac1df308cef87f5bcf064b3d25cf66 (diff)
ENGR00179747: MX6DL-Fix boot failure
Fix the boot failure caused by: 8f0c21e06d4f7d0c7c078d6261ccd75f2a45c3ab MX6- Add bus frequency scaling support There is no SATA on MX6DL. Accessing SATA PHYs early in the boot process causes the system to crash. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r--arch/arm/mach-mx6/clock.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index 81fe0596b7d4..5be83fc6a831 100644
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -5295,10 +5295,12 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,
lp_med_freq = 0;
/* Turn OFF all unnecessary PHYs. */
- /* Turn off SATA PHY. */
- base = ioremap(MX6Q_SATA_BASE_ADDR, SZ_8K);
- reg = __raw_readl(base + PORT_PHY_CTL);
- __raw_writel(reg | PORT_PHY_CTL_PDDQ_LOC, base + PORT_PHY_CTL);
+ if (cpu_is_mx6q()) {
+ /* Turn off SATA PHY. */
+ base = ioremap(MX6Q_SATA_BASE_ADDR, SZ_8K);
+ reg = __raw_readl(base + PORT_PHY_CTL);
+ __raw_writel(reg | PORT_PHY_CTL_PDDQ_LOC, base + PORT_PHY_CTL);
+ }
/* Turn off HDMI PHY. */
base = ioremap(MX6Q_HDMI_ARB_BASE_ADDR, SZ_128K);