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authorDong Aisheng <b29396@freescale.com>2015-08-14 16:04:19 +0800
committerDong Aisheng <b29396@freescale.com>2015-08-17 18:57:05 +0800
commite4944a51c4bb950a8f13e421eefc000a87350e23 (patch)
treebe306bf20cc5ef49e220381a291112b7459179d7
parent1223a2cfcf002be47fe433b1102e618f90851c9d (diff)
MLK-11370 dts: imx6ul-evk: enhance driver strength of sd clk signalrel_imx_3.14.38_6ul_ga
The SD CLK signal measured by scope shows the signal rise/fall time does not meet the spec requirement, need increase the pad driver strength to meet the spec. The pad setting value is given by the HW team which has been verified from scope. Signed-off-by: Dong Aisheng <b29396@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6ul-14x14-evk.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index 06c5bd0a26ff..8ae0e42a3d53 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -562,7 +562,7 @@
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
- MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
@@ -594,7 +594,7 @@
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
- MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059