diff options
| author | Rakesh Babu Bodla <rbodla@nvidia.com> | 2015-04-27 14:07:05 +0530 |
|---|---|---|
| committer | Matthew Pedro <mapedro@nvidia.com> | 2015-05-14 09:53:15 -0700 |
| commit | a3d4881945e79212bc5f337c819e1ae1b4fd5dbd (patch) | |
| tree | e8f4a9a576305d937ae4c4b6acebd3ccba549058 | |
| parent | d6f5cb65f3c74c95667404a9dc3ffa380d60cc6d (diff) | |
usb: phy: tegra: set UTMIP_PCOUNT_UPDN_DIV to zero
Set UTMIP_PCOUNT_UPDN_DIV to zero to address hosts
having jitter issues.
Bug 200085253
Bug 200100469
Change-Id: I3f0202b74dbbbd697d52c386626112714f26834f
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/736178
(cherry picked from commit 6d1f2be772751ebb0fb07dce2fc6992467c19eab)
Reviewed-on: http://git-master/r/740972
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
| -rw-r--r-- | drivers/usb/phy/tegra11x_usb_phy.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/usb/phy/tegra11x_usb_phy.c b/drivers/usb/phy/tegra11x_usb_phy.c index c56d6ca8c5f7..b177a5a87041 100644 --- a/drivers/usb/phy/tegra11x_usb_phy.c +++ b/drivers/usb/phy/tegra11x_usb_phy.c @@ -1,7 +1,7 @@ /* * drivers/usb/phy/tegra11x_usb_phy.c * - * Copyright (c) 2012-2014 NVIDIA Corporation. All rights reserved. + * Copyright (c) 2012-2015 NVIDIA Corporation. All rights reserved. * * * This software is licensed under the terms of the GNU General Public @@ -120,6 +120,7 @@ #define UTMIP_HSRX_CFG0 0x810 #define UTMIP_ELASTIC_LIMIT(x) (((x) & 0x1f) << 10) #define UTMIP_IDLE_WAIT(x) (((x) & 0x1f) << 15) +#define UTMIP_PCOUNT_UPDN_DIV(x) (((x) & 0xf) << 24) #define UTMIP_HSRX_CFG1 0x814 #define UTMIP_HS_SYNC_START_DLY(x) (((x) & 0x1f) << 1) @@ -1048,6 +1049,9 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy) val = readl(base + UTMIP_HSRX_CFG0); val &= ~(UTMIP_IDLE_WAIT(~0) | UTMIP_ELASTIC_LIMIT(~0)); +#ifndef CONFIG_ARCH_TEGRA_21x_SOC + val &= ~UTMIP_PCOUNT_UPDN_DIV(~0); +#endif val |= UTMIP_IDLE_WAIT(config->idle_wait_delay); val |= UTMIP_ELASTIC_LIMIT(config->elastic_limit); writel(val, base + UTMIP_HSRX_CFG0); |