diff options
| author | Pradeep Goudagunta <pgoudagunta@nvidia.com> | 2011-09-14 17:17:44 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-09-14 17:00:45 -0700 |
| commit | 61151365f2d905e25378334e71b9eda69a748ce2 (patch) | |
| tree | f1f5424987afde6f8c1f977a8699e787cbba7d8b | |
| parent | 56c3f6be699554b5778f279dfd2ed7457b9d93c9 (diff) | |
ARM: tegra: uart: Restore FCR in uart resume
Restore FCR while resuming debug uart, to enable RX and TX FIFOs with
trigger levels configured during initialisation of debug uart port.
Bug 867063
Change-Id: I37bc521d7263ee7a3aa0fa77295b768be7b44361
Reviewed-on: http://git-master/r/52343
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/suspend.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c index ae7e8536b583..933c9b3e3611 100644 --- a/arch/arm/mach-tegra/suspend.c +++ b/arch/arm/mach-tegra/suspend.c @@ -828,6 +828,8 @@ static void tegra_debug_uart_resume(void) /* DLAB = 0 */ writeb(lcr & ~UART_LCR_DLAB, uart + UART_LCR * 4); + writeb(UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_01 | UART_FCR_R_TRIG_01, + uart + UART_FCR * 4); writeb(uart_state[2], uart + UART_IER * 4); /* DLAB = 1 */ |