diff options
| author | Peter Chen <peter.chen@freescale.com> | 2015-02-02 16:29:00 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@freescale.com> | 2015-02-04 14:29:54 +0800 |
| commit | 491864b36afa439bc50e68998d1867513542bd46 (patch) | |
| tree | 723459e287d0f6d6dcc48ef5f6b2fc08224e9616 | |
| parent | d1f82bbb193d7707893fd8acc650659596d0d3c4 (diff) | |
MLK-10196-1 ARM: imx6: change anatop 3p0 property
- Delete regulator-always-on for 3p0 since it needs to enable/disable
on the fly.
- Add "anatop-enable-bit" property as the offset of enable bit for
3p0, 1p1, and 2p5.
- USB PHY refers "reg_3p0" phandle at its node.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 12 |
3 files changed, 24 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 2442393366fe..197bc525c51d 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -521,20 +521,21 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; - regulator-3p0@120 { + reg_3p0: regulator-3p0@120 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3150000>; - regulator-always-on; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; anatop-reg-offset = <0x120>; anatop-vol-bit-shift = <8>; anatop-vol-bit-width = <5>; anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5@130 { @@ -549,6 +550,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2000000>; anatop-max-voltage = <2750000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore@140 { @@ -615,6 +617,7 @@ reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; clocks = <&clks 182>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; @@ -623,6 +626,7 @@ reg = <0x020ca000 0x1000>; interrupts = <0 45 0x04>; clocks = <&clks 183>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 92ca6c50eead..442fb2f00e38 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -481,20 +481,21 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; - regulator-3p0@120 { + reg_3p0: regulator-3p0@120 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3150000>; - regulator-always-on; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; anatop-reg-offset = <0x120>; anatop-vol-bit-shift = <8>; anatop-vol-bit-width = <5>; anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5@130 { @@ -509,6 +510,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2100000>; anatop-max-voltage = <2850000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore@140 { @@ -575,6 +577,7 @@ reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; clocks = <&clks IMX6SL_CLK_USBPHY1>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; @@ -583,6 +586,7 @@ reg = <0x020ca000 0x1000>; interrupts = <0 45 0x04>; clocks = <&clks IMX6SL_CLK_USBPHY2>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 76825f49cfd1..3ef75049e561 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -449,20 +449,21 @@ anatop-min-bit-val = <4>; anatop-min-voltage = <800000>; anatop-max-voltage = <1375000>; + anatop-enable-bit = <0>; }; - regulator-3p0@120 { + reg_3p0: regulator-3p0@120 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3150000>; - regulator-always-on; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; anatop-reg-offset = <0x120>; anatop-vol-bit-shift = <8>; anatop-vol-bit-width = <5>; anatop-min-bit-val = <0>; anatop-min-voltage = <2625000>; anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; }; regulator-2p5@130 { @@ -477,6 +478,7 @@ anatop-min-bit-val = <0>; anatop-min-voltage = <2100000>; anatop-max-voltage = <2875000>; + anatop-enable-bit = <0>; }; reg_arm: regulator-vddcore@140 { @@ -777,6 +779,7 @@ reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; clocks = <&clks IMX6SX_CLK_USBPHY1>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; @@ -785,6 +788,7 @@ reg = <0x020ca000 0x1000>; interrupts = <0 45 0x04>; clocks = <&clks IMX6SX_CLK_USBPHY2>; + phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; }; |