diff options
| author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2007-12-10 20:28:51 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-12-14 17:34:29 +0000 |
| commit | dd99d9661c72fe251b842705f2e7cfaa4918a13c (patch) | |
| tree | b3d3a402005a083c9273cc10ecc9fc87da719e58 | |
| parent | 18ca38d26f65c849af109eb911295c7dde71ce3b (diff) | |
[MIPS] Alchemy: fix PCI resource conflict
... by getting the PCI resources back into the 32-bit range -- there's no
need therefore for CONFIG_RESOURCES_64BIT either. This makes Alchemy PCI
work again while currently the kernel skips the bus scan.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/au1000/Kconfig | 9 | ||||
| -rw-r--r-- | arch/mips/au1000/common/pci.c | 8 | ||||
| -rw-r--r-- | include/asm-mips/mach-au1x00/au1000.h | 9 |
3 files changed, 9 insertions, 17 deletions
diff --git a/arch/mips/au1000/Kconfig b/arch/mips/au1000/Kconfig index 05d1354aad3a..1fe97cccead1 100644 --- a/arch/mips/au1000/Kconfig +++ b/arch/mips/au1000/Kconfig @@ -7,7 +7,6 @@ config MIPS_MTX1 bool "4G Systems MTX-1 board" select DMA_NONCOHERENT select HW_HAS_PCI - select RESOURCES_64BIT if PCI select SOC_AU1500 select SYS_SUPPORTS_LITTLE_ENDIAN @@ -22,7 +21,6 @@ config MIPS_DB1000 select SOC_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_DB1100 @@ -44,7 +42,6 @@ config MIPS_DB1500 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN @@ -54,7 +51,6 @@ config MIPS_DB1550 select HW_HAS_PCI select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_MIRAGE @@ -68,7 +64,6 @@ config MIPS_PB1000 select SOC_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI - select RESOURCES_64BIT if PCI select SWAP_IO_SPACE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -77,7 +72,6 @@ config MIPS_PB1100 select SOC_AU1100 select DMA_NONCOHERENT select HW_HAS_PCI - select RESOURCES_64BIT if PCI select SWAP_IO_SPACE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -86,7 +80,6 @@ config MIPS_PB1200 select SOC_AU1200 select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_PB1500 @@ -94,7 +87,6 @@ config MIPS_PB1500 select SOC_AU1500 select DMA_NONCOHERENT select HW_HAS_PCI - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_PB1550 @@ -103,7 +95,6 @@ config MIPS_PB1550 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_XXS1500 diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index 9be99a68932a..6fa70a36a250 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c @@ -39,15 +39,15 @@ /* TBD */ static struct resource pci_io_resource = { - .start = (resource_size_t)PCI_IO_START, - .end = (resource_size_t)PCI_IO_END, + .start = PCI_IO_START, + .end = PCI_IO_END, .name = "PCI IO space", .flags = IORESOURCE_IO }; static struct resource pci_mem_resource = { - .start = (resource_size_t)PCI_MEM_START, - .end = (resource_size_t)PCI_MEM_END, + .start = PCI_MEM_START, + .end = PCI_MEM_END, .name = "PCI memory space", .flags = IORESOURCE_MEM }; diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index bf7701243d71..cb18af989645 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -1680,10 +1680,11 @@ enum soc_au1200_ints { #define Au1500_PCI_MEM_START 0x440000000ULL #define Au1500_PCI_MEM_END 0x44FFFFFFFULL -#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000) -#define PCI_IO_END (Au1500_PCI_IO_END) -#define PCI_MEM_START (Au1500_PCI_MEM_START) -#define PCI_MEM_END (Au1500_PCI_MEM_END) +#define PCI_IO_START 0x00001000 +#define PCI_IO_END 0x000FFFFF +#define PCI_MEM_START 0x40000000 +#define PCI_MEM_END 0x4FFFFFFF + #define PCI_FIRST_DEVFN (0<<3) #define PCI_LAST_DEVFN (19<<3) |