diff options
author | Huang Shijie <b32955@freescale.com> | 2013-03-26 13:49:37 +0800 |
---|---|---|
committer | Huang Shijie <b32955@freescale.com> | 2013-04-03 14:08:04 +0800 |
commit | 1a1ff18ec19b2f1f4cd50a3298bb0a5fefe925d0 (patch) | |
tree | 2400c93d84b57b6df0ab6c4560b4e4cbf1f020b6 | |
parent | 573bab0be2427d6664420eaf9d8e272dbe9d840f (diff) |
ENGR00256315-1 Revert "ENGR00244769-2 [NOR FLASH]-Improve WEIM NOR speed"
This reverts commit 58209e14383520d58b1bf74e0e9f98f7d05b80c6.
After apply these two patches, we can not pass the stress test.
So revert these two patches.
Signed-off-by: Huang Shijie <b32955@freescale.com>
-rw-r--r-- | arch/arm/configs/imx6_defconfig | 7 | ||||
-rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabreauto.c | 53 |
2 files changed, 13 insertions, 47 deletions
diff --git a/arch/arm/configs/imx6_defconfig b/arch/arm/configs/imx6_defconfig index 13a4ef171e2e..5ad4a002676d 100644 --- a/arch/arm/configs/imx6_defconfig +++ b/arch/arm/configs/imx6_defconfig @@ -301,7 +301,6 @@ CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y # CONFIG_ARCH_MX503 is not set # CONFIG_ARCH_MX51 is not set CONFIG_ARCH_MX6=y -# CONFIG_MACH_IMX_BLUETOOTH_RFKILL is not set CONFIG_ARCH_MX6Q=y CONFIG_FORCE_MAX_ZONEORDER=14 CONFIG_SOC_IMX6Q=y @@ -754,8 +753,8 @@ CONFIG_MTD_CFI_UTIL=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -CONFIG_MTD_IMX6X_WEIMNOR=y +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_PLATRAM is not set @@ -1101,7 +1100,6 @@ CONFIG_TOUCHSCREEN_MAX11801=y # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_WM97XX is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_NOVATEK is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set @@ -1960,7 +1958,6 @@ CONFIG_USB_OTG=y # # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_EHCI_HCD=y -# CONFIG_FSL_USB_TEST_MODE is not set CONFIG_USB_EHCI_ARC=y CONFIG_USB_EHCI_ARC_OTG=y # CONFIG_USB_EHCI_ARC_HSIC is not set diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index 11adabd66abf..49991d412a0e 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -459,7 +459,6 @@ static struct spi_board_info m25p32_spi0_board_info[] __initdata = { .platform_data = &m25p32_spi_flash_data, }, }; - static void spi_device_init(void) { spi_register_board_info(m25p32_spi0_board_info, @@ -500,8 +499,8 @@ static struct physmap_flash_data nor_flash_data = { .nr_parts = ARRAY_SIZE(mxc_nor_partitions), }; -static struct platform_device imx6x_weimnor_device = { - .name = "imx6x-weimnor", +static struct platform_device physmap_flash_device = { + .name = "physmap-flash", .id = 0, .dev = { .platform_data = &nor_flash_data, @@ -515,45 +514,15 @@ static void mx6q_setup_weimcs(void) unsigned int reg; void __iomem *nor_reg = MX6_IO_ADDRESS(WEIM_BASE_ADDR); void __iomem *ccm_reg = MX6_IO_ADDRESS(CCM_BASE_ADDR); - struct clk *clk; - u32 rate; - /* CLKCTL_CCGR6: Set emi_slow_clock to be on in all modes */ + /*CCM_BASE_ADDR + CLKCTL_CCGR6*/ reg = readl(ccm_reg + 0x80); reg |= 0x00000C00; writel(reg, ccm_reg + 0x80); - /* Timing settings below based upon datasheet for M29W256GL7AN6E - These setting assume that the EIM_SLOW_CLOCK is set to 132 MHz */ - clk = clk_get(NULL, "emi_slow_clk"); - if (IS_ERR(clk)) - printk(KERN_ERR "emi_slow_clk not found\n"); - - rate = clk_get_rate(clk); - if (rate != 132000000) - printk(KERN_ERR "Warning: emi_slow_clk not set to 132 MHz!" - " WEIM NOR timing may be incorrect!\n"); - - /* EIM_CS0GCR1: 16-bit port on DATA[31:16], Burst Length 8 words, - Chip select enable is set */ - __raw_writel(0x00020181, nor_reg); - - /* EIM_CS0GCR2: Address hold time is set to cycle after ADV negation */ - __raw_writel(0x00000001, nor_reg + 0x00000004); - - /* EIM_CS0RCR1: RWSC = 9 EIM Clocks, ADV Negation = 2 EIM Clocks, - OE Assertion = 2 EIM Clocks */ - __raw_writel(0x0a022000, nor_reg + 0x00000008); - - /* EIM_CS0RCR2: APR = Page read enabled, PAT = 4 EIM Clocks */ - __raw_writel(0x0000c000, nor_reg + 0x0000000c); - - /* EIM_CS0WCR1: WWSC = 8 EIM Clocks, WADVN = 1, WBEA = 1, WBEN = 1, - WEA = 1, WEN = 1 */ + __raw_writel(0x00620081, nor_reg); + __raw_writel(0x1C022000, nor_reg + 0x00000008); __raw_writel(0x0804a240, nor_reg + 0x00000010); - - /* EIM_WCR: WDOG_EN = 1, INTPOL = 1 */ - __raw_writel(0x00000120, nor_reg + 0x00000090); } static int max7310_1_setup(struct i2c_client *client, @@ -1633,12 +1602,12 @@ static void __init mx6_board_init(void) } /* SPI */ imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data); - if (spinor_en) - spi_device_init(); - else if (weimnor_en) { - mx6q_setup_weimcs(); - platform_device_register(&imx6x_weimnor_device); - } + if (spinor_en) + spi_device_init(); + else if (weimnor_en) { + mx6q_setup_weimcs(); + platform_device_register(&physmap_flash_device); + } imx6q_add_mxc_hdmi(&hdmi_data); imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data); |