diff options
| author | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-25 17:11:59 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:56:05 -0700 |
| commit | c5920cab688838e130a7d61a4ddbf779f40794c1 (patch) | |
| tree | 8e97e39b68a490293cc007e1c582005f230092ca | |
| parent | 0001309feee3277569e8d57c32d95dd8777f89e9 (diff) | |
ARM: tegra: usb_phy: Limit USB_TXFILLTUNING to Tegra2
Change-Id: I36c86d49b7a6ed7b420ec92d4cdf413ce77fda3b
| -rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index b5ca77db9972..3a648cb2ce7f 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -883,11 +883,13 @@ static int uhsic_phy_postresume(struct tegra_usb_phy *phy) unsigned long val; void __iomem *base = phy->regs; +#ifdef CONFIG_ARCH_TEGRA_2x_SOC val = readl(base + USB_TXFILLTUNING); if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) { val = USB_FIFO_TXFILL_THRES(0x10); writel(val, base + USB_TXFILLTUNING); } +#endif return 0; } @@ -1230,13 +1232,13 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy) val = readl(base + USB_PORTSC1); val &= ~USB_PORTSC1_PTS(~0); writel(val, base + USB_PORTSC1); -#endif val = readl(base + USB_TXFILLTUNING); if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) { val = USB_FIFO_TXFILL_THRES(0x10); writel(val, base + USB_TXFILLTUNING); } +#endif val = readl(base + USB_PORTSC1); val &= ~(USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN); |