diff options
| author | Fugang Duan <b38611@freescale.com> | 2014-09-09 14:43:21 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:00:09 -0600 |
| commit | fd5a6bb725ef7409b23026a2d117c0b2258a3211 (patch) | |
| tree | 98c273b2b09afb929b8e277f7f6df2ec2410c99f | |
| parent | a7d805c92c93c11469ba6f1d6f09c1473813a248 (diff) | |
MLK-11457-03 ARM: dts: imx6sl-evk: add uart4 support
Add uart4 DCE and DTE pinctrl set. Since there have pin confliction,
so add new dts file. To avoid a flood of dts files, there comment out
DTE pinctrl set. If user want to test DTE mode, it needs to rebuild
the DTB file.
(cherry picked from commit a3602fa5796bb86ba432474220389ec712bde92a)
Signed-off-by: Fugang Duan <B38611@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk-uart.dts | 23 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 18 |
3 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 0f8df7a90736..54547d238b0a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -310,6 +310,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-wandboard-revb1.dtb dtb-$(CONFIG_SOC_IMX6SL) += \ imx6sl-evk.dtb \ + imx6sl-evk-uart.dtb \ imx6sl-warp.dtb dtb-$(CONFIG_SOC_IMX6SX) += \ imx6sx-14x14-arm2.dtb \ diff --git a/arch/arm/boot/dts/imx6sl-evk-uart.dts b/arch/arm/boot/dts/imx6sl-evk-uart.dts new file mode 100644 index 000000000000..6179842731a7 --- /dev/null +++ b/arch/arm/boot/dts/imx6sl-evk-uart.dts @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6sl-evk.dts" + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4_1>; + fsl,uart-has-rtscts; + status = "okay"; + /* for DTE mode, add below change */ + /* fsl,dte-mode; */ + /* pinctrl-0 = <&pinctrl_uart4dte_1>; */ +}; + +&usdhc1 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 80aeecedc3f5..8e9a33652920 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -409,6 +409,24 @@ >; }; + pinctrl_uart4_1: uart4grp-1 { + fsl,pins = < + MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0x1b0b1 + MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 0x1b0b1 + MX6SL_PAD_SD1_DAT7__UART4_CTS_B 0x1b0b1 + MX6SL_PAD_SD1_DAT6__UART4_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4dte_1: uart4dtegrp-1 { + fsl,pins = < + MX6SL_PAD_SD1_DAT5__UART4_RX_DATA 0x1b0b1 + MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 0x1b0b1 + MX6SL_PAD_SD1_DAT6__UART4_CTS_B 0x1b0b1 + MX6SL_PAD_SD1_DAT7__UART4_RTS_B 0x1b0b1 + >; + }; + pinctrl_usbotg1: usbotg1grp { fsl,pins = < MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 |