diff options
| author | Sumit Bhattacharya <sumitb@nvidia.com> | 2011-10-21 11:58:36 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:06 -0800 |
| commit | 3e6b424e14636a558c081290d14f8fc64ff16e87 (patch) | |
| tree | fa501234867e06c01812f23a0d20b9a2dfcbf703 | |
| parent | 71f4ccea46e6d1d96b7a70c0ee8dfe37ed666ff4 (diff) | |
arm: tegra: Add HDA support
Modify HDA device names to be inline with Intel HDA driver. Also
add entries for both HDA controller memory base address and HDA
controller PCI base address.
Also modify the dev_id and con_id of HDA related clocks so that
they can be used by HDA driver.
Bug 872652
Change-Id: Ifa05fe7d3d524e9ae310594a0e582c297dc52ef7
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/59506
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Rebase-Id: R098f861d94a78a1401841b71b8c591b902b7b0bc
| -rw-r--r-- | arch/arm/mach-tegra/devices.c | 53 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 6 |
2 files changed, 28 insertions, 31 deletions
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index ce117946cb3e..76ab47e43f70 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -1081,6 +1081,31 @@ struct platform_device tegra_dam_device2 = { .resource = dam_resource2, .num_resources = ARRAY_SIZE(dam_resource2), }; + +static u64 tegra_hda_dma_mask = DMA_BIT_MASK(32); +static struct resource hda_platform_resources[] = { + [0] = { + .start = TEGRA_HDA_BASE, + .end = TEGRA_HDA_BASE + TEGRA_HDA_SIZE - 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = INT_HDA, + .end = INT_HDA, + .flags = IORESOURCE_IRQ + }, +}; + +struct platform_device tegra_hda_device = { + .name = "tegra30-hda", + .id = -1, + .dev = { + .coherent_dma_mask = DMA_BIT_MASK(32), + .dma_mask = &tegra_hda_dma_mask, + }, + .resource = hda_platform_resources, + .num_resources = ARRAY_SIZE(hda_platform_resources), +}; #endif struct platform_device spdif_dit_device = { @@ -1103,34 +1128,6 @@ struct platform_device tegra_pcm_device = { .id = -1, }; -#if defined(CONFIG_SND_HDA_TEGRA) -static u64 tegra_hda_dma_mask = DMA_BIT_MASK(32); - -static struct resource tegra_hda_resources[] = { - [0] = { - .start = TEGRA_HDA_BASE, - .end = TEGRA_HDA_BASE + TEGRA_HDA_SIZE - 1 , - .flags = IORESOURCE_MEM - }, - [1] = { - .start = INT_HDA, - .end = INT_HDA, - .flags = IORESOURCE_IRQ - }, -}; - -struct platform_device tegra_hda_device = { - .name = "tegra-hda", - .id = 0, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .dma_mask = &tegra_hda_dma_mask, - }, - .resource = tegra_hda_resources, - .num_resources = ARRAY_SIZE(tegra_hda_resources), -}; -#endif - static struct resource w1_resources[] = { [0] = { .start = INT_OWR, diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 3b92d7d7bec5..f485a957cae8 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -3945,9 +3945,9 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam2", "tegra30-dam.2", NULL, 110, 0x3e0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), - PERIPH_CLK("hda", "hda", NULL, 125, 0x428, 108000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("hda2codec_2x", "hda2codec_2x", NULL, 111, 0x3e4, 48000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("hda2hdmi", "hda2hdmi", NULL, 128, 0, 48000000, mux_clk_m, 0), + PERIPH_CLK("hda", "tegra30-hda", "hda", 125, 0x428, 108000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("hda2codec_2x", "tegra30-hda", "hda2codec", 111, 0x3e4, 48000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("hda2hdmi", "tegra30-hda", "hda2hdmi", 128, 0, 48000000, mux_clk_m, 0), PERIPH_CLK("sbc1", "spi_tegra.0", NULL, 41, 0x134, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("sbc2", "spi_tegra.1", NULL, 44, 0x118, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("sbc3", "spi_tegra.2", NULL, 46, 0x11c, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), |