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author | Xinyu Chen <xinyu.chen@freescale.com> | 2012-09-06 13:05:01 +0800 |
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committer | Xinyu Chen <xinyu.chen@freescale.com> | 2012-09-06 13:05:01 +0800 |
commit | 18d57884842aff062c5654e36620942c43e4bc48 (patch) | |
tree | 1d4b18927d2bab3cf3473d9e15530c35ec5077a4 | |
parent | 640736923c1952ccbfcebf1bb33bad25c4812464 (diff) |
ENGR00223226 irq: Disable GPU IRQ trigger for governor to save power
This commit resolve the merge error.
As PDK's IRQ trigger is enabled, so during merge
3way merge will combine them together, brings redundant
codes.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
-rw-r--r-- | arch/arm/mach-mx6/irq.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-mx6/irq.c b/arch/arm/mach-mx6/irq.c index 0498cd90e8e8..c5cad62c3069 100644 --- a/arch/arm/mach-mx6/irq.c +++ b/arch/arm/mach-mx6/irq.c @@ -65,14 +65,6 @@ static struct irq_tuner mxc_irq_tuner[] = { .up_threshold = 0, .enable = 0,}, { - .irq_number = 42, /* GPU 2D */ - .up_threshold = 40, - .enable = 1,}, - { - .irq_number = 43, /* GPU VG */ - .up_threshold = 0, - .enable = 1,}, - { .irq_number = 54, /* uSDHC1 */ .up_threshold = 4, .enable = 1,}, |