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authorZhang Jiejing <jiejing.zhang@freescale.com>2012-03-15 17:09:40 +0800
committerZhang Jiejing <jiejing.zhang@freescale.com>2012-03-18 23:39:46 +0800
commit0816d2c71400aea90e73fba260108a4eb3870dd5 (patch)
tree419095cd54235e24ef26a5a40299e6d0b27cfc52
parent00ad172b303f67d197fbd9763d0561101d00760e (diff)
ENGR00176974 MX6Q: make 624M WP work, change 624 WP to 672 WPimx-android-r13.2
since pll1 have a limit that cannot scaling down to 650M and below so change the 600M WP to 672MHz. otherwise, the 600WP's clock will depens on last frequency. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
-rw-r--r--arch/arm/mach-mx6/cpu_op-mx6.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
index 6f030102c821..60714dc7c8bf 100644
--- a/arch/arm/mach-mx6/cpu_op-mx6.c
+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
@@ -36,8 +36,8 @@ static struct cpu_op mx6_cpu_op_1_2G[] = {
.cpu_podf = 0,
.cpu_voltage = 1100000,},
{
- .pll_rate = 624000000,
- .cpu_rate = 624000000,
+ .pll_rate = 672000000,
+ .cpu_rate = 672000000,
.cpu_voltage = 1100000,},
{
.pll_rate = 792000000,
@@ -64,8 +64,8 @@ static struct cpu_op mx6_cpu_op_1G[] = {
.cpu_podf = 0,
.cpu_voltage = 1100000,},
{
- .pll_rate = 624000000,
- .cpu_rate = 624000000,
+ .pll_rate = 672000000,
+ .cpu_rate = 672000000,
.cpu_voltage = 1100000,},
{
.pll_rate = 792000000,