diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-06-23 18:41:24 -0700 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2011-10-13 23:15:18 -0700 |
| commit | fc2f899fe93cb4aea2e22c18d98b1b856429d572 (patch) | |
| tree | 5c6ae91762bff096eb69f4a97855cf2c8da6b1ea | |
| parent | 4bb23d23321e976f08bb05b37df80e2b7df5a09c (diff) | |
ARM: tegra: dvfs: Add dvfs table for Tegra3 x3 chips
Bug 841336
Change-Id: Id3fb9a6a81189ad25ec9aea201fcb931ebe17f44
Reviewed-on: http://git-master/r/51949
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_dvfs.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index c9ba978f61f4..83447cd650c9 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -31,7 +31,7 @@ static bool tegra_dvfs_cpu_disabled; static bool tegra_dvfs_core_disabled; static const int cpu_millivolts[MAX_DVFS_FREQS] = - {750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150}; + {750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150, 1237}; static const int core_millivolts[MAX_DVFS_FREQS] = {1000, 1050, 1100, 1150, 1200, 1250, 1300}; @@ -41,8 +41,8 @@ static const int core_speedo_nominal_millivolts[] = { 1200, 1200, 1300 }; static const int cpu_speedo_nominal_millivolts[] = -/* speedo_id 0, 1, 2, 3 */ - { 1125, 1150, 1150, 1150 }; +/* speedo_id 0, 1, 2, 3, 4, 5, 6 */ + { 1125, 1150, 1150, 1150, 1237, 1237, 1237 }; #define KHZ 1000 #define MHZ 1000000 @@ -56,7 +56,7 @@ static int cpu_below_core = VDD_CPU_BELOW_VDD_CORE; static struct dvfs_rail tegra3_dvfs_rail_vdd_cpu = { .reg_id = "vdd_cpu", - .max_millivolts = 1150, + .max_millivolts = 1250, .min_millivolts = 850, .step = VDD_SAFE_STEP, }; @@ -83,7 +83,7 @@ static int tegra3_get_core_floor_mv(int cpu_mv) return 1200; if (cpu_mv <= 1075) return 1200; - if (cpu_mv <= 1150) + if (cpu_mv <= 1250) return 1300; BUG(); } @@ -133,7 +133,7 @@ static struct dvfs_relationship tegra3_dvfs_relationships[] = { } static struct dvfs cpu_dvfs_table[] = { - /* Cpu voltages (mV): 750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150*/ + /* Cpu voltages (mV): 750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150, 1237 */ CPU_DVFS("cpu_g", 0, 0, MHZ, 1, 1, 1, 1, 684, 684, 817, 817, 817, 1026, 1102, 1149, 1187, 1225, 1282, 1300), CPU_DVFS("cpu_g", 0, 1, MHZ, 1, 1, 1, 1, 807, 807, 948, 948, 948, 1117, 1171, 1206, 1300), CPU_DVFS("cpu_g", 0, 2, MHZ, 1, 1, 1, 1, 883, 883, 1039, 1039, 1039, 1178, 1206, 1300), @@ -152,6 +152,9 @@ static struct dvfs cpu_dvfs_table[] = { CPU_DVFS("cpu_g", 3, 2, MHZ, 1, 1, 1, 1, 720, 720, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400), CPU_DVFS("cpu_g", 3, 3, MHZ, 1, 1, 1, 1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400), + CPU_DVFS("cpu_g", 5, 3, MHZ, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1180, 1230, 1300, 1320, 1350, 1380, 1420, 1450, 1700), + CPU_DVFS("cpu_g", 6, 3, MHZ, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1180, 1230, 1300, 1320, 1350, 1380, 1420, 1450, 1700), + /* * "Safe entry" to be used when no match for chip speedo, process * corner is found (just to boot at low rate); must be the last one |