diff options
author | Colin Cross <ccross@android.com> | 2011-01-09 19:20:14 -0800 |
---|---|---|
committer | Colin Cross <ccross@android.com> | 2011-01-09 19:20:14 -0800 |
commit | b99662a653ac3d90bfada1bfc326d3138229860c (patch) | |
tree | 024b0706480e7caae913130288512a6d2a4053cf | |
parent | c07aee9df0e40fe9621db66ec00857228090e46c (diff) | |
parent | 962feda6df4542dfae908df64504c8e8046db1d4 (diff) |
Merge branch 'linux-tegra-2.6.36' into android-tegra-2.6.36
-rw-r--r-- | arch/arm/mach-tegra/dma.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/usb_phy.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 47 | ||||
-rw-r--r-- | drivers/rtc/rtc-tps6586x.c | 4 | ||||
-rw-r--r-- | drivers/usb/host/ehci-tegra.c | 40 |
6 files changed, 89 insertions, 20 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index 0ac303ebf84c..db94fcf58399 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -327,6 +327,7 @@ int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, struct tegra_dma_req *req) { unsigned long irq_flags; + struct tegra_dma_req *_req; int start_dma = 0; if (req->size > TEGRA_DMA_MAX_TRANSFER_SIZE || @@ -337,6 +338,13 @@ int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, spin_lock_irqsave(&ch->lock, irq_flags); + list_for_each_entry(_req, &ch->list, node) { + if (req == _req) { + spin_unlock_irqrestore(&ch->lock, irq_flags); + return -EEXIST; + } + } + req->bytes_transferred = 0; req->status = 0; /* STATUS_EMPTY just means the DMA hasn't processed the buf yet. */ diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h index 8b4beae773a7..bb16019256ec 100644 --- a/arch/arm/mach-tegra/include/mach/usb_phy.h +++ b/arch/arm/mach-tegra/include/mach/usb_phy.h @@ -83,6 +83,10 @@ int tegra_usb_phy_preresume(struct tegra_usb_phy *phy); int tegra_usb_phy_postresume(struct tegra_usb_phy *phy); +int tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy); + +int tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy); + int tegra_usb_phy_close(struct tegra_usb_phy *phy); #endif //__MACH_USB_PHY_H diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 692bb845d588..d3e17c1621f7 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -1475,7 +1475,7 @@ static struct clk tegra_pll_a = { .ops = &tegra_pll_ops, .reg = 0xb0, .parent = &tegra_pll_p_out1, - .max_rate = 56448000, + .max_rate = 73728000, .u.pll = { .input_min = 2000000, .input_max = 31000000, @@ -1495,7 +1495,7 @@ static struct clk tegra_pll_a_out0 = { .parent = &tegra_pll_a, .reg = 0xb4, .reg_shift = 0, - .max_rate = 56448000, + .max_rate = 73728000, }; static struct clk_pll_freq_table tegra_pll_d_freq_table[] = { @@ -1694,7 +1694,7 @@ static struct clk tegra_clk_audio = { .name = "audio", .inputs = mux_audio_sync_clk, .reg = 0x38, - .max_rate = 24000000, + .max_rate = 73728000, .ops = &tegra_audio_sync_clk_ops }; diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index f0d1ec803cfa..3dc3aed4c915 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -117,6 +117,12 @@ #define UTMIP_HS_DISCON_DISABLE (1 << 8) #define UTMIP_MISC_CFG0 0x824 +#define UTMIP_DPDM_OBSERVE (1 << 26) +#define UTMIP_DPDM_OBSERVE_SEL(x) (((x) & 0xf) << 27) +#define UTMIP_DPDM_OBSERVE_SEL_FS_J UTMIP_DPDM_OBSERVE_SEL(0xf) +#define UTMIP_DPDM_OBSERVE_SEL_FS_K UTMIP_DPDM_OBSERVE_SEL(0xe) +#define UTMIP_DPDM_OBSERVE_SEL_FS_SE1 UTMIP_DPDM_OBSERVE_SEL(0xd) +#define UTMIP_DPDM_OBSERVE_SEL_FS_SE0 UTMIP_DPDM_OBSERVE_SEL(0xc) #define UTMIP_SUSPEND_EXIT_ON_EDGE (1 << 22) #define UTMIP_MISC_CFG1 0x828 @@ -499,6 +505,33 @@ static void utmi_phy_postresume(struct tegra_usb_phy *phy) writel(val, base + UTMIP_TX_CFG0); } +static void utmi_phy_restore_start(struct tegra_usb_phy *phy) +{ + unsigned long val; + void __iomem *base = phy->regs; + + val = readl(base + UTMIP_MISC_CFG0); + val |= UTMIP_DPDM_OBSERVE_SEL_FS_J; + writel(val, base + UTMIP_MISC_CFG0); + udelay(1); + + val = readl(base + UTMIP_MISC_CFG0); + val |= UTMIP_DPDM_OBSERVE; + writel(val, base + UTMIP_MISC_CFG0); + udelay(10); +} + +static void utmi_phy_restore_end(struct tegra_usb_phy *phy) +{ + unsigned long val; + void __iomem *base = phy->regs; + + val = readl(base + UTMIP_MISC_CFG0); + val &= ~UTMIP_DPDM_OBSERVE; + writel(val, base + UTMIP_MISC_CFG0); + udelay(10); +} + static void ulpi_viewport_write(struct tegra_usb_phy *phy, u8 addr, u8 data) { unsigned long val; @@ -704,6 +737,20 @@ int tegra_usb_phy_postresume(struct tegra_usb_phy *phy) return 0; } +int tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy) +{ + if (phy->instance != 1) + utmi_phy_restore_start(phy); + return 0; +} + +int tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) +{ + if (phy->instance != 1) + utmi_phy_restore_end(phy); + return 0; +} + int tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) { if (phy->instance != 1) diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c index 9ab93cb9de0e..ca6138bbda4b 100644 --- a/drivers/rtc/rtc-tps6586x.c +++ b/drivers/rtc/rtc-tps6586x.c @@ -95,7 +95,7 @@ static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm) seconds -= rtc->epoch_start; - ticks = seconds << 10; + ticks = (unsigned long long)seconds << 10; buff[0] = (ticks >> 32) & 0xff; buff[1] = (ticks >> 24) & 0xff; buff[2] = (ticks >> 16) & 0xff; @@ -148,7 +148,7 @@ static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) } seconds -= rtc->epoch_start; - ticks = (seconds << 10) & 0xffffff; + ticks = (unsigned long long)seconds << 10; buff[0] = (ticks >> 16) & 0xff; buff[1] = (ticks >> 8) & 0xff; diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 262bbb01228b..2341904808bc 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -151,11 +151,7 @@ static int tegra_ehci_hub_control( tegra_usb_phy_preresume(tegra->phy); - /* reschedule root hub polling during resume signaling */ ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); - /* check the port again */ - mod_timer(&ehci_to_hcd(ehci)->rh_timer, - ehci->reset_done[wIndex-1]); temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); /* start resume signalling */ @@ -173,6 +169,8 @@ static int tegra_ehci_hub_control( if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) pr_err("%s: timeout waiting for PORT_SUSPEND\n", __func__); + ehci->reset_done[wIndex-1] = 0; + tegra->port_resuming = 1; goto done; } @@ -255,6 +253,7 @@ static int tegra_usb_resume(struct usb_hcd *hcd) struct tegra_ehci_context *context = &tegra->context; struct ehci_regs __iomem *hw = tegra->ehci->regs; unsigned long val; + int lp0_resume = 0; set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); tegra_ehci_power_up(ehci_to_hcd(tegra->ehci)); @@ -266,6 +265,13 @@ static int tegra_usb_resume(struct usb_hcd *hcd) goto restart; } + tegra_ehci_phy_restore_start(tegra->phy); + + /* Check if the phy resume from LP0. When the phy resume from LP0 + * USB register will be reset. */ + if (!readl(&hw->async_next)) + lp0_resume = 1; + /* Restore register context */ writel(TEGRA_USB_USBMODE_HOST, &hw->reserved[19]); writel(context->otgsc, &hw->reserved[18]); @@ -280,17 +286,19 @@ static int tegra_usb_resume(struct usb_hcd *hcd) writel(val, &hw->port_status[0]); udelay(10); - /* Program the field PTC in PORTSC based on the saved speed mode */ - val = readl(&hw->port_status[0]); - val &= ~(TEGRA_USB_PORTSC1_PTC(~0)); - if (context->port_speed == TEGRA_USB_PHY_PORT_HIGH) - val |= TEGRA_USB_PORTSC1_PTC(5); - else if (context->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL) - val |= TEGRA_USB_PORTSC1_PTC(6); - else if (context->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW) - val |= TEGRA_USB_PORTSC1_PTC(7); - writel(val, &hw->port_status[0]); - udelay(10); + if (lp0_resume) { + /* Program the field PTC in PORTSC based on the saved speed mode */ + val = readl(&hw->port_status[0]); + val &= ~(TEGRA_USB_PORTSC1_PTC(~0)); + if (context->port_speed == TEGRA_USB_PHY_PORT_HIGH) + val |= TEGRA_USB_PORTSC1_PTC(5); + else if (context->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL) + val |= TEGRA_USB_PORTSC1_PTC(6); + else if (context->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW) + val |= TEGRA_USB_PORTSC1_PTC(7); + writel(val, &hw->port_status[0]); + udelay(10); + } /* Disable test mode by setting PTC field to NORMAL_OP */ val = readl(&hw->port_status[0]); @@ -332,9 +340,11 @@ static int tegra_usb_resume(struct usb_hcd *hcd) } } + tegra_ehci_phy_restore_end(tegra->phy); return 0; restart: + tegra_ehci_phy_restore_end(tegra->phy); tegra_ehci_restart(hcd); return 0; } |