diff options
| author | Anson Huang <b20788@freescale.com> | 2011-08-11 12:39:11 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2011-08-11 12:44:41 +0800 |
| commit | 9c5fe66ccb75d3170e9964a3a51415a353067ee7 (patch) | |
| tree | 03e89c539a17c37b2a722894f0f3acf4b9e09626 | |
| parent | 4366723a2403ee4cbcf8252c988bb90049e4b2b2 (diff) | |
ENGR00154705 [MX6Q]suspend/resume sometimes hang
1. Better to write disable and reset together into
SRC_SCR register;
2. Should wait for reset done.
Signed-off-by: Anson Huang <b20788@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/plat_hotplug.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/mach-mx6/plat_hotplug.c b/arch/arm/mach-mx6/plat_hotplug.c index 3a124b084744..67e8196ac120 100644 --- a/arch/arm/mach-mx6/plat_hotplug.c +++ b/arch/arm/mach-mx6/plat_hotplug.c @@ -33,19 +33,31 @@ int platform_cpu_kill(unsigned int cpu) unsigned int val; val = jiffies; - /* wait secondary cpu to die, timeout is 500ms */ + /* wait secondary cpu to die, timeout is 50ms */ while (atomic_read(&cpu_die_done) == 0) { - if (time_after(jiffies, (unsigned long)(val + HZ / 2))) { + if (time_after(jiffies, (unsigned long)(val + HZ / 20))) { printk(KERN_WARNING "cpu %d: cpu could not die\n", cpu); break; } } + /* * we're ready for shutdown now, so do it */ - val = readl(src_base + SRC_SCR_OFFSET); + val = __raw_readl(src_base + SRC_SCR_OFFSET); val &= ~(1 << (BP_SRC_SCR_CORES_DBG_RST + cpu)); - writel(val, src_base + SRC_SCR_OFFSET); + val |= (1 << (BP_SRC_SCR_CORE0_RST + cpu)); + __raw_writel(val, src_base + SRC_SCR_OFFSET); + + val = jiffies; + /* wait secondary cpu reset done, timeout is 10ms */ + while ((__raw_readl(src_base + SRC_SCR_OFFSET) & + (1 << (BP_SRC_SCR_CORE0_RST + cpu))) != 0) { + if (time_after(jiffies, (unsigned long)(val + HZ / 100))) { + printk(KERN_WARNING "cpu %d: cpu reset fail\n", cpu); + break; + } + } atomic_set(&cpu_die_done, 0); return 1; |