video: tegra: host: Don't depend on 32-bit ulong

Avoid BITS_PER_LONG and macros BIT_WORD and BIT_MASK that depend on
it. Also avoid ulong when a 32-bit value is expected.

Bug 1377229

Change-Id: I2b146917bf6aff618c01124d16fbdadd804581a1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/298698
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

7 files changed, 39 insertions, 29 deletions

diff --git a/drivers/video/tegra/host/bus_client.c b/drivers/video/tegra/host/bus_client.c
index f0817e9831af..33a9680ee6ec 100644
--- a/drivers/video/tegra/host/bus_client.c
+++ b/drivers/video/tegra/host/bus_client.c
@@ -796,7 +796,7 @@ static u32 create_mask(u32 *words, int num)
 {
 	int i;
 	u32 word = 0;
-	for (i = 0; i < num && words[i] && words[i] < BITS_PER_LONG; i++)
+	for (i = 0; i < num && words[i] && words[i] < 32; i++)
 		word |= BIT(words[i]);
 
 	return word;
diff --git a/drivers/video/tegra/host/dev.h b/drivers/video/tegra/host/dev.h
index f1aecc76a0b4..e094fab401b5 100644
--- a/drivers/video/tegra/host/dev.h
+++ b/drivers/video/tegra/host/dev.h
@@ -140,4 +140,13 @@ static inline void mem_wr32(void *ptr, int w, u32 data)
 	((u32 *)ptr)[w] = data;
 }
 
+static inline u32 bit_mask(u32 nr)
+{
+	return 1UL << (nr % 32);
+}
+
+static inline u32 bit_word(u32 nr)
+{
+	return nr / 32;
+}
 #endif
diff --git a/drivers/video/tegra/host/gk20a/fifo_gk20a.c b/drivers/video/tegra/host/gk20a/fifo_gk20a.c
index 5fb1c23a91b7..d7ac868cd5c7 100644
--- a/drivers/video/tegra/host/gk20a/fifo_gk20a.c
+++ b/drivers/video/tegra/host/gk20a/fifo_gk20a.c
@@ -837,7 +837,7 @@ static void gk20a_fifo_handle_chsw_fault(struct gk20a *g)
 static void gk20a_fifo_handle_mmu_fault(struct gk20a *g)
 {
 	bool fake_fault;
-	ulong fault_id;
+	u32 fault_id;
 	u32 engine_mmu_id;
 	int i;
 
@@ -864,7 +864,7 @@ static void gk20a_fifo_handle_mmu_fault(struct gk20a *g)
 		mutex_lock(&g->fifo.runlist_info[i].mutex);
 
 	/* go through all faulted engines */
-	for_each_set_bit(engine_mmu_id, &fault_id, BITS_PER_LONG) {
+	for_each_set_bit(engine_mmu_id, &fault_id, 32) {
 		/* bits in fifo_intr_mmu_fault_id_r do not correspond 1:1 to
 		 * engines. Convert engine_mmu_id to engine_id */
 		u32 engine_id = gk20a_mmu_id_to_engine_id(engine_mmu_id);
@@ -949,7 +949,7 @@ static void gk20a_fifo_handle_mmu_fault(struct gk20a *g)
 	}
 
 	/* reset engines */
-	for_each_set_bit(engine_mmu_id, &fault_id, BITS_PER_LONG) {
+	for_each_set_bit(engine_mmu_id, &fault_id, 32) {
 		u32 engine_id = gk20a_mmu_id_to_engine_id(engine_mmu_id);
 		if (engine_id != ~0)
 			gk20a_fifo_reset_engine(g, engine_id);
@@ -971,7 +971,7 @@ static void gk20a_fifo_handle_mmu_fault(struct gk20a *g)
 	schedule_work(&g->fifo.fault_restore_thread);
 }
 
-void gk20a_fifo_recover(struct gk20a *g, ulong engine_ids)
+static void gk20a_fifo_recover(struct gk20a *g, u32 engine_ids)
 {
 	unsigned long end_jiffies = jiffies +
 		msecs_to_jiffies(gk20a_get_gr_idle_timeout(g));
@@ -981,12 +981,12 @@ void gk20a_fifo_recover(struct gk20a *g, ulong engine_ids)
 
 	/* store faulted engines in advance */
 	g->fifo.mmu_fault_engines = 0;
-	for_each_set_bit(engine_id, &engine_ids, BITS_PER_LONG)
+	for_each_set_bit(engine_id, &engine_ids, 32)
 		g->fifo.mmu_fault_engines |=
 			BIT(gk20a_engine_id_to_mmu_id(engine_id));
 
 	/* trigger faults for all bad engines */
-	for_each_set_bit(engine_id, &engine_ids, BITS_PER_LONG) {
+	for_each_set_bit(engine_id, &engine_ids, 32) {
 		if (engine_id > g->fifo.max_engines) {
 			WARN_ON(true);
 			break;
@@ -1016,7 +1016,7 @@ void gk20a_fifo_recover(struct gk20a *g, ulong engine_ids)
 		nvhost_err(dev_from_gk20a(g), "mmu fault timeout");
 
 	/* release mmu fault trigger */
-	for_each_set_bit(engine_id, &engine_ids, BITS_PER_LONG)
+	for_each_set_bit(engine_id, &engine_ids, 32)
 		gk20a_writel(g, fifo_trigger_mmu_fault_r(engine_id), 0);
 }
 
diff --git a/drivers/video/tegra/host/host1x/host1x_intr.c b/drivers/video/tegra/host/host1x/host1x_intr.c
index 7a788f89fdcb..702d76298384 100644
--- a/drivers/video/tegra/host/host1x/host1x_intr.c
+++ b/drivers/video/tegra/host/host1x/host1x_intr.c
@@ -51,13 +51,14 @@ static irqreturn_t syncpt_thresh_cascade_isr(int irq, void *dev_id)
 	unsigned long reg;
 	int i, id;
 
-	for (i = 0; i < DIV_ROUND_UP(dev->info.nb_pts, BITS_PER_LONG); i++) {
+	for (i = 0; i < DIV_ROUND_UP(dev->info.nb_pts, 32); i++) {
 		reg = readl(sync_regs +
 				host1x_sync_syncpt_thresh_cpu0_int_status_r() +
 				i * REGISTER_STRIDE);
-		for_each_set_bit(id, &reg, BITS_PER_LONG) {
+
+		for_each_set_bit(id, &reg, 32) {
 			struct nvhost_intr_syncpt *sp;
-			int sp_id = i * BITS_PER_LONG + id;
+			int sp_id = i * 32 + id;
 
 			if (unlikely(sp_id >= dev->info.nb_pts)) {
 				dev_err(&dev->dev->dev, "%s(): syncpoint id %d is beyond the number of syncpoints (%d)\n",
@@ -139,9 +140,9 @@ static void t20_intr_enable_syncpt_intr(struct nvhost_intr *intr, u32 id)
 	struct nvhost_master *dev = intr_to_dev(intr);
 	void __iomem *sync_regs = dev->sync_aperture;
 
-	writel(BIT_MASK(id), sync_regs +
+	writel(bit_mask(id), sync_regs +
 			host1x_sync_syncpt_thresh_int_enable_cpu0_r() +
-			BIT_WORD(id) * REGISTER_STRIDE);
+			bit_word(id) * REGISTER_STRIDE);
 }
 
 static void t20_intr_disable_syncpt_intr(struct nvhost_intr *intr, u32 id)
@@ -149,17 +150,17 @@ static void t20_intr_disable_syncpt_intr(struct nvhost_intr *intr, u32 id)
 	struct nvhost_master *dev = intr_to_dev(intr);
 	void __iomem *sync_regs = dev->sync_aperture;
 
-	writel(BIT_MASK(id), sync_regs +
+	writel(bit_mask(id), sync_regs +
 			host1x_sync_syncpt_thresh_int_disable_r() +
-			BIT_WORD(id) * REGISTER_STRIDE);
+			bit_word(id) * REGISTER_STRIDE);
 
 	/* clear status for both cpu's */
-	writel(BIT_MASK(id), sync_regs +
+	writel(bit_mask(id), sync_regs +
 		host1x_sync_syncpt_thresh_cpu0_int_status_r() +
-		BIT_WORD(id) * REGISTER_STRIDE);
-	writel(BIT_MASK(id), sync_regs +
+		bit_word(id) * REGISTER_STRIDE);
+	writel(bit_mask(id), sync_regs +
 		host1x_sync_syncpt_thresh_cpu1_int_status_r() +
-		BIT_WORD(id) * REGISTER_STRIDE);
+		bit_word(id) * REGISTER_STRIDE);
 }
 
 static void t20_intr_disable_all_syncpt_intrs(struct nvhost_intr *intr)
@@ -168,7 +169,7 @@ static void t20_intr_disable_all_syncpt_intrs(struct nvhost_intr *intr)
 	void __iomem *sync_regs = dev->sync_aperture;
 	u32 reg;
 
-	for (reg = 0; reg < BIT_WORD(dev->info.nb_pts) * REGISTER_STRIDE;
+	for (reg = 0; reg < bit_word(dev->info.nb_pts) * REGISTER_STRIDE;
 			reg += REGISTER_STRIDE) {
 		/* disable interrupts for both cpu's */
 		writel(0xffffffffu, sync_regs +
@@ -195,13 +196,13 @@ static void t20_intr_syncpt_intr_ack(struct nvhost_intr_syncpt *syncpt,
 
 	void __iomem *sync_regs = intr_to_dev(intr)->sync_aperture;
 
-	u32 reg = BIT_WORD(id) * REGISTER_STRIDE;
+	u32 reg = bit_word(id) * REGISTER_STRIDE;
 
 	if (disable_intr)
-		writel(BIT_MASK(id), sync_regs +
+		writel(bit_mask(id), sync_regs +
 		       host1x_sync_syncpt_thresh_int_disable_r() + reg);
 
-	writel(BIT_MASK(id), sync_regs +
+	writel(bit_mask(id), sync_regs +
 		host1x_sync_syncpt_thresh_cpu0_int_status_r() + reg);
 }
 
@@ -239,7 +240,7 @@ static irqreturn_t t20_intr_host1x_isr(int irq, void *dev_id)
 	writel(ext_stat, sync_regs + host1x_sync_hintstatus_ext_r());
 	writel(stat, sync_regs + host1x_sync_hintstatus_r());
 
-	for_each_set_bit(i, &intstat, BITS_PER_LONG) {
+	for_each_set_bit(i, &intstat, 32) {
 		if (intr->generic_isr[i])
 			intr->generic_isr[i]();
 	}
diff --git a/drivers/video/tegra/host/host1x/host1x_syncpt.c b/drivers/video/tegra/host/host1x/host1x_syncpt.c
index 869c5b492ce7..148bb2289e40 100644
--- a/drivers/video/tegra/host/host1x/host1x_syncpt.c
+++ b/drivers/video/tegra/host/host1x/host1x_syncpt.c
@@ -91,7 +91,7 @@ static void t20_syncpt_cpu_incr(struct nvhost_syncpt *sp, u32 id)
 		nvhost_debug_dump(syncpt_to_dev(sp));
 		return;
 	}
-	writel(BIT_MASK(id), dev->sync_aperture +
+	writel(bit_mask(id), dev->sync_aperture +
 			host1x_sync_syncpt_cpu_incr_r() + reg_offset * 4);
 }
 
diff --git a/drivers/video/tegra/host/nvhost_intr.c b/drivers/video/tegra/host/nvhost_intr.c
index 719a7fa31c75..b63e38265fd9 100644
--- a/drivers/video/tegra/host/nvhost_intr.c
+++ b/drivers/video/tegra/host/nvhost_intr.c
@@ -281,10 +281,10 @@ irqreturn_t nvhost_syncpt_thresh_fn(void *dev_id)
 irqreturn_t nvhost_intr_irq_fn(int irq, void *dev_id)
 {
 	struct nvhost_intr *intr = dev_id;
-	unsigned long intstat = intr->intstatus;
+	u32 intstat = intr->intstatus;
 	int i;
 
-	for_each_set_bit(i, &intstat, BITS_PER_LONG) {
+	for_each_set_bit(i, &intstat, 32) {
 		if (intr->generic_isr_thread[i])
 			intr->generic_isr_thread[i]();
 	}
diff --git a/drivers/video/tegra/host/nvhost_intr.h b/drivers/video/tegra/host/nvhost_intr.h
index 1f2b08e20d0c..cec4f8119c90 100644
--- a/drivers/video/tegra/host/nvhost_intr.h
+++ b/drivers/video/tegra/host/nvhost_intr.h
@@ -86,8 +86,8 @@ struct nvhost_intr {
 	int general_irq;
 	int syncpt_irq;
 	struct workqueue_struct *wq;
-	void (*generic_isr[BITS_PER_LONG])(void);
-	void (*generic_isr_thread[BITS_PER_LONG])(void);
+	void (*generic_isr[32])(void);
+	void (*generic_isr_thread[32])(void);
 	u32 intstatus;
 };
 #define intr_to_dev(x) container_of(x, struct nvhost_master, intr)