diff options
author | Kevin Huang <kevinh@nvidia.com> | 2011-09-27 20:51:07 -0700 |
---|---|---|
committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2011-09-30 02:50:29 -0700 |
commit | 8f2ce3c04c16331332d4ba12f097787fd82af2db (patch) | |
tree | bc80bfe1886b628a2492a67c8e22b0b58401b24f | |
parent | c53f8fc9d5d05427684aafb4ad6552eb6cff7ff7 (diff) |
video: tegra: dsi: Fix value of PKT_WR_FIFO_SEL.
Bug 834959
Change-Id: I01e9da153e961fd08744d97d367e4523be4da2eb
Reviewed-on: http://git-master/r/54861
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
-rw-r--r-- | drivers/video/tegra/dc/dsi.c | 2 | ||||
-rw-r--r-- | drivers/video/tegra/dc/dsi.h | 13 |
2 files changed, 3 insertions, 12 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index 6dcd386d8d98..f5772b7259c5 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -1063,14 +1063,12 @@ static void tegra_dsi_set_control_reg_hs(struct tegra_dc_dsi_data *dsi) if (dsi->info.video_data_type == TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE) { dsi_control |= DSI_CTRL_CMD_MODE; - host_dsi_control |= HOST_DSI_CTRL_CMD_MODE; dcs_cmd = DSI_DCS_CMDS_LT5_DCS_CMD(DSI_WRITE_MEMORY_START)| DSI_DCS_CMDS_LT3_DCS_CMD(DSI_WRITE_MEMORY_CONTINUE); dsi->status.vtype = DSI_VIDEO_TYPE_CMD_MODE; } else { dsi_control |= DSI_CTRL_VIDEO_MODE; - host_dsi_control |= HOST_DSI_CTRL_VIDEO_MODE; dsi->status.vtype = DSI_VIDEO_TYPE_VIDEO_MODE; } diff --git a/drivers/video/tegra/dc/dsi.h b/drivers/video/tegra/dc/dsi.h index cbfb2d56178e..6ccf544dd842 100644 --- a/drivers/video/tegra/dc/dsi.h +++ b/drivers/video/tegra/dc/dsi.h @@ -155,22 +155,15 @@ enum { DSI_HOST_DSI_CONTROL_IMM_BTA(TEGRA_DSI_DISABLE) | \ DSI_HOST_DSI_CONTROL_PKT_BTA(TEGRA_DSI_DISABLE) | \ DSI_HOST_DSI_CONTROL_CS_ENABLE(TEGRA_DSI_ENABLE) | \ - DSI_HOST_DSI_CONTROL_ECC_ENABLE(TEGRA_DSI_ENABLE)) + DSI_HOST_DSI_CONTROL_ECC_ENABLE(TEGRA_DSI_ENABLE) | \ + DSI_HOST_DSI_CONTROL_PKT_WR_FIFO_SEL(HOST_ONLY)) #define HOST_DSI_CTRL_HOST_DRIVEN \ (DSI_HOST_DSI_CONTROL_CRC_RESET(RESET_CRC) | \ - DSI_HOST_DSI_CONTROL_HOST_TX_TRIG_SRC(IMMEDIATE) | \ - DSI_HOST_DSI_CONTROL_PKT_WR_FIFO_SEL(HOST_ONLY)) + DSI_HOST_DSI_CONTROL_HOST_TX_TRIG_SRC(IMMEDIATE)) #define HOST_DSI_CTRL_DC_DRIVEN 0 -#define HOST_DSI_CTRL_VIDEO_MODE \ - (DSI_HOST_DSI_CONTROL_PKT_WR_FIFO_SEL(VIDEO_HOST)) - -#define HOST_DSI_CTRL_CMD_MODE \ - (DSI_HOST_DSI_CONTROL_PKT_WR_FIFO_SEL(HOST_ONLY)) - - #define DSI_CTRL_HOST_DRIVEN (DSI_CONTROL_VID_ENABLE(TEGRA_DSI_DISABLE) | \ DSI_CONTROL_HOST_ENABLE(TEGRA_DSI_ENABLE)) |