diff options
author | Hans de Goede <hdegoede@redhat.com> | 2016-03-20 17:00:36 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-03-27 16:15:04 +0200 |
commit | 1bfbcfd1475886ef0f49ef99850b730873843124 (patch) | |
tree | ee61f71005f61ce2d50844057a6b03c3d82129a1 | |
parent | 4bf89c1dc692ad58d774c88dcf8f7946759ab04d (diff) |
ARM: dts: sun8i: Add eMMC dt node on Orangepi Plus boards
The Orangepi Plus has a 16GB eMMC, the vcc, the lack of pull-ups and
the use of the hw-reset pin have all been verified with the board
schematic.
With this dts node for mmc2, the eMMC runs at the following ios settings:
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
Note the mmcblk1boot0/boot1 partitions are unused as the BROM will load
the SPL from 8k from the start of the main blockdev, just as with a
regular sdcard in mmc0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r-- | arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts index c5c17bdf8542..6273ddfa8c8f 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -186,6 +186,23 @@ status = "okay"; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; + /* eMMC is missing pull-ups */ + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; +}; + ®_usb1_vbus { gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; status = "okay"; |