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authorTom Cherry <tcherry@nvidia.com>2011-09-27 15:02:54 -0700
committerRyan Wong <ryanw@nvidia.com>2011-09-27 23:10:10 -0700
commit3bb1e9ff9b7302d3c13a27fd24eea6e5968ff7cb (patch)
tree9329201122dd7eaa96ee8f7fc48c8a2fbef1afb7
parent91f509f7c8c795691f37d2ad1554e5ea7f9c4770 (diff)
arm: tegra: dvfs: Remove 850mv and 875mv dvfs entrytegra-12r9-android-2.3
Change-Id: Idf489cf40c4e657d938c8249053ff443f615acc7 Reviewed-on: http://git-master/r/54813 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/tegra3_dvfs.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c
index 34c308d29672..43e63a7f3426 100644
--- a/arch/arm/mach-tegra/tegra3_dvfs.c
+++ b/arch/arm/mach-tegra/tegra3_dvfs.c
@@ -134,23 +134,23 @@ static struct dvfs_relationship tegra3_dvfs_relationships[] = {
static struct dvfs cpu_dvfs_table[] = {
/* Cpu voltages (mV): 750, 775, 800, 825, 850, 875, 900, 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 1125, 1150*/
- CPU_DVFS("cpu_g", 0, 0, MHZ, 1, 1, 1, 1, 684, 684, 817, 817, 817, 1026, 1102, 1149, 1187, 1225, 1282, 1300),
- CPU_DVFS("cpu_g", 0, 1, MHZ, 1, 1, 1, 1, 807, 807, 948, 948, 948, 1117, 1171, 1206, 1300),
- CPU_DVFS("cpu_g", 0, 2, MHZ, 1, 1, 1, 1, 883, 883, 1039, 1039, 1039, 1178, 1206, 1300),
- CPU_DVFS("cpu_g", 0, 3, MHZ, 1, 1, 1, 1, 931, 931, 1102, 1102, 1102, 1216, 1300),
-
- CPU_DVFS("cpu_g", 1, 0, MHZ, 1, 1, 1, 1, 550, 550, 680, 680, 680, 820, 970, 1040, 1080, 1150, 1200, 1280, 1300),
- CPU_DVFS("cpu_g", 1, 1, MHZ, 1, 1, 1, 1, 650, 650, 820, 820, 820, 1000, 1060, 1100, 1200, 1300),
- CPU_DVFS("cpu_g", 1, 2, MHZ, 1, 1, 1, 1, 720, 720, 880, 880, 880, 1090, 1180, 1200, 1300),
- CPU_DVFS("cpu_g", 1, 3, MHZ, 1, 1, 1, 1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300),
-
- CPU_DVFS("cpu_g", 2, 1, MHZ, 1, 1, 1, 1, 650, 650, 820, 820, 820, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
- CPU_DVFS("cpu_g", 2, 2, MHZ, 1, 1, 1, 1, 720, 720, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
- CPU_DVFS("cpu_g", 2, 3, MHZ, 1, 1, 1, 1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
-
- CPU_DVFS("cpu_g", 3, 1, MHZ, 1, 1, 1, 1, 650, 650, 820, 820, 820, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
- CPU_DVFS("cpu_g", 3, 2, MHZ, 1, 1, 1, 1, 720, 720, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
- CPU_DVFS("cpu_g", 3, 3, MHZ, 1, 1, 1, 1, 800, 800, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
+ CPU_DVFS("cpu_g", 0, 0, MHZ, 1, 1, 1, 1, 1, 1, 817, 817, 817, 1026, 1102, 1149, 1187, 1225, 1282, 1300),
+ CPU_DVFS("cpu_g", 0, 1, MHZ, 1, 1, 1, 1, 1, 1, 948, 948, 948, 1117, 1171, 1206, 1300),
+ CPU_DVFS("cpu_g", 0, 2, MHZ, 1, 1, 1, 1, 1, 1, 1039, 1039, 1039, 1178, 1206, 1300),
+ CPU_DVFS("cpu_g", 0, 3, MHZ, 1, 1, 1, 1, 1, 1, 1102, 1102, 1102, 1216, 1300),
+
+ CPU_DVFS("cpu_g", 1, 0, MHZ, 1, 1, 1, 1, 1, 1, 680, 680, 680, 820, 970, 1040, 1080, 1150, 1200, 1280, 1300),
+ CPU_DVFS("cpu_g", 1, 1, MHZ, 1, 1, 1, 1, 1, 1, 820, 820, 820, 1000, 1060, 1100, 1200, 1300),
+ CPU_DVFS("cpu_g", 1, 2, MHZ, 1, 1, 1, 1, 1, 1, 880, 880, 880, 1090, 1180, 1200, 1300),
+ CPU_DVFS("cpu_g", 1, 3, MHZ, 1, 1, 1, 1, 1, 1, 1000, 1000, 1000, 1180, 1230, 1300),
+
+ CPU_DVFS("cpu_g", 2, 1, MHZ, 1, 1, 1, 1, 1, 1, 820, 820, 820, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
+ CPU_DVFS("cpu_g", 2, 2, MHZ, 1, 1, 1, 1, 1, 1, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+ CPU_DVFS("cpu_g", 2, 3, MHZ, 1, 1, 1, 1, 1, 1, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
+
+ CPU_DVFS("cpu_g", 3, 1, MHZ, 1, 1, 1, 1, 1, 1, 820, 820, 820, 1000, 1060, 1100, 1200, 1250, 1300, 1330, 1400),
+ CPU_DVFS("cpu_g", 3, 2, MHZ, 1, 1, 1, 1, 1, 1, 880, 880, 880, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+ CPU_DVFS("cpu_g", 3, 3, MHZ, 1, 1, 1, 1, 1, 1, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
/*
* "Safe entry" to be used when no match for chip speedo, process