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authorPeter Korsgaard <jacmet@sunsite.dk>2011-03-10 06:52:13 +0000
committerDavid S. Miller <davem@davemloft.net>2011-03-14 15:02:14 -0700
commitaf1dc13e607c1d1a909e21ee87aafbe7b9d4ae81 (patch)
treef1651a8643c90b238b259c01dd91fa56fb9d632c
parentdc187cb381f1bceb30498861ece510245c43ed9f (diff)
phylib: SIOCGMIIREG/SIOCSMIIREG: allow access to all mdio addresses
phylib would silently ignore the phy_id argument to these ioctls and perform the read/write with the active phydev address, whereas most non-phylib drivers seem to allow access to all mdio addresses (E.G. pcnet_cs). Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/phy/phy.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index a8445c72fc13..f7670330f988 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -319,7 +319,8 @@ int phy_mii_ioctl(struct phy_device *phydev,
/* fall through */
case SIOCGMIIREG:
- mii_data->val_out = phy_read(phydev, mii_data->reg_num);
+ mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
+ mii_data->reg_num);
break;
case SIOCSMIIREG:
@@ -350,8 +351,9 @@ int phy_mii_ioctl(struct phy_device *phydev,
}
}
- phy_write(phydev, mii_data->reg_num, val);
-
+ mdiobus_write(phydev->bus, mii_data->phy_id,
+ mii_data->reg_num, val);
+
if (mii_data->reg_num == MII_BMCR &&
val & BMCR_RESET &&
phydev->drv->config_init) {