diff options
author | Tomasz Stanislawski <t.stanislaws@samsung.com> | 2014-04-04 16:53:19 +0200 |
---|---|---|
committer | Tomasz Figa <t.figa@samsung.com> | 2014-05-14 19:40:15 +0200 |
commit | a5b219b40c463ff162368c7a1dc93387054c79f5 (patch) | |
tree | 8315e76300b0282e96e48b6b1434712804ceb4a5 | |
parent | 20b82ae27e89739ed8740323913d58efe593ef91 (diff) |
clk: samsung: exynos4: export sclk_hdmiphy clock
Export sclk_hdmiphy clock to be usable from DT.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
-rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 2 | ||||
-rw-r--r-- | include/dt-bindings/clock/exynos4.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 7e2adcbee4cd..c4df294bb7fb 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -428,7 +428,7 @@ static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata /* fixed rate clocks generated inside the soc */ static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[] __initdata = { FRATE(0, "sclk_hdmi24m", NULL, CLK_IS_ROOT, 24000000), - FRATE(0, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000), + FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000), FRATE(0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000), }; diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index 3ff13bcbe56c..1106ca540a96 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -33,6 +33,7 @@ #define CLK_MOUT_MPLL_USER_C 18 /* Exynos4x12 only */ #define CLK_MOUT_CORE 19 #define CLK_MOUT_APLL 20 +#define CLK_SCLK_HDMIPHY 22 /* gate for special clocks (sclk) */ #define CLK_SCLK_FIMC0 128 |