diff options
| author | guoyin.chen <guoyin.chen@freescale.com> | 2014-08-06 16:54:37 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2014-08-06 16:54:37 +0800 |
| commit | 5dbcfe3d3f75e9e53c8b90f8f3ce5987d9c94123 (patch) | |
| tree | 35984ceac4872cbddad06572dc7b371b20810850 | |
| parent | 5701fd97c35ef77658476ae8cf221f1f5883bd2a (diff) | |
| parent | ef3bce5feb2ed36c9f4483287454d35ae330dbe3 (diff) | |
Merge remote-tracking branch 'fsl-linux-sdk/imx_3.10.31_1.1.0_beta' into imx_3.10.y_android_kk4.4.3-betakk4.4.3_2.0.0-beta
| -rw-r--r-- | drivers/mmc/core/sd.c | 7 | ||||
| -rw-r--r-- | drivers/pci/host/pci-imx6.c | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index bb518a8850e1..1c5ac7471466 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -514,6 +514,13 @@ static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) else { mmc_set_timing(card->host, timing); mmc_set_clock(card->host, card->sw_caps.uhs_max_dtr); + + /* + * FIXME: Sandisk SD3.0 cards DDR50 mode requires such + * delay to get stable, without this delay we may encounter + * CRC errors after switch to DDR50 mode + */ + mmc_delay(100); } return 0; diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index ed991a22020b..1ecc542037f9 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -334,6 +334,9 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); } + /* allow the clocks to stabilize */ + usleep_range(200, 500); + if (gpio_is_valid(imx6_pcie->reset_gpio)) { gpio_set_value(imx6_pcie->reset_gpio, 0); mdelay(1); |