diff options
| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2016-07-27 19:16:39 -0400 |
|---|---|---|
| committer | Sasha Levin <alexander.levin@verizon.com> | 2016-08-19 23:07:58 -0400 |
| commit | baea0d65a4810802ee865d123c84436c52b416fd (patch) | |
| tree | 94ec6335385f8b8d4bd6315095628b9e22a21aff | |
| parent | c1b4d25bc66d0c5f1552daeb0cb72b0794bb1e62 (diff) | |
drm/nouveau/gr/nv3x: fix instobj write offsets in gr setup
[ Upstream commit d0e62ef6ed257715a88d0e5d7cd850a1695429e2 ]
This should fix some unaligned access warnings. This is also likely to
fix non-descript issues on nv30/nv34 as a result of incorrect channel
setup.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96836
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c index dcc84eb54fb6..183d1701ae94 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c @@ -88,8 +88,8 @@ nv30_gr_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, nv_wo32(chan, i, 0x00040004); for (i = 0x1f18; i <= 0x3088 ; i += 16) { nv_wo32(chan, i + 0, 0x10700ff9); - nv_wo32(chan, i + 1, 0x0436086c); - nv_wo32(chan, i + 2, 0x000c001b); + nv_wo32(chan, i + 4, 0x0436086c); + nv_wo32(chan, i + 8, 0x000c001b); } for (i = 0x30b8; i < 0x30c8; i += 4) nv_wo32(chan, i, 0x0000ffff); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c index 985b7f3306ae..720c97135e85 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c @@ -86,8 +86,8 @@ nv34_gr_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, nv_wo32(chan, i, 0x00040004); for (i = 0x15ac; i <= 0x271c ; i += 16) { nv_wo32(chan, i + 0, 0x10700ff9); - nv_wo32(chan, i + 1, 0x0436086c); - nv_wo32(chan, i + 2, 0x000c001b); + nv_wo32(chan, i + 4, 0x0436086c); + nv_wo32(chan, i + 8, 0x000c001b); } for (i = 0x274c; i < 0x275c; i += 4) nv_wo32(chan, i, 0x0000ffff); |