diff options
| author | Nitin Garg <nitin.garg@freescale.com> | 2012-06-08 09:22:21 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2012-06-08 09:22:21 -0500 |
| commit | 569dc9187a890c0b04779df0af882df69fd093aa (patch) | |
| tree | 8cd0de86385781893b7f5115c8df0946f24cb388 | |
| parent | bac8d703dba3dd242836fbf9093c4a2ec5950873 (diff) | |
ENGR00209719: Atheros AR6003 Wifi stability issue on suspend/resume.
Work around the issue that software reset will get card detection
circuit stop working.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index f427c7ba5d38..136cdd0a8744 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -581,6 +581,17 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) return; } esdhc_clrset_le(host, 0xff, val, reg); + + /* + * The esdhc has a design violation to SDHC spec which tells + * that software reset should not affect card detection circuit. + * But esdhc clears its SYSCTL register bits [0..2] during the + * software reset. This will stop those clocks that card detection + * circuit relies on. To work around it, we turn the clocks on back + * to keep card detection circuit functional. + */ + if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1)) + esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL); } static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host) |