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authorGary King <gking@nvidia.com>2010-06-23 14:55:14 -0700
committerGary King <gking@nvidia.com>2010-06-24 11:30:35 -0700
commit348476d87c6072cc9c98eb678d54640f502b7f6e (patch)
treec0caeb3773e67b90b1132aef18467bb9a05bb21c
parent9de542c0f371bb69a115dbdca2e5bf22993f91ff (diff)
[ARM/tegra] harmony ODM: add ventana support to PMU adaptation
move the GPIO enable pin definitions out of the adaptation code and into the discovery database, so that the PMU adaptation can be used by both harmony and ventana. remove the non-harmony code paths from this driver, since they are not used anywhere Change-Id: Ic6f16a8f246d692df22d785bbf056153ff40ac1a Reviewed-on: http://git-master/r/3107 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/include/nvodm_query_discovery.h2
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.c542
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.h18
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_i2c.h2
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_interrupt.c3
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_supply_info_table.h52
-rw-r--r--arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/tps6586x_reg.h2
-rw-r--r--arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_addresses.h45
-rw-r--r--arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_peripherals.h39
9 files changed, 262 insertions, 443 deletions
diff --git a/arch/arm/mach-tegra/include/nvodm_query_discovery.h b/arch/arm/mach-tegra/include/nvodm_query_discovery.h
index 768db0f2ec3e..6eede575bdf3 100644
--- a/arch/arm/mach-tegra/include/nvodm_query_discovery.h
+++ b/arch/arm/mach-tegra/include/nvodm_query_discovery.h
@@ -142,6 +142,8 @@ extern "C"
#define NV_VDD_FUSE_ODM_ID (NV_ODM_GUID('N','V','D','D','F','U','S','E'))
+#define NV_VDD_HDMI_INT_ID (NV_ODM_GUID('N','V','D','D','H','P','D','0'))
+
/**
* Some of the NVIDIA driver libraries enumerate peripherals based on the
* logical functionality that the peripheral performs, rather than by the
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.c b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.c
index 197a2c227e1d..099422df6e9c 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.c
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.c
@@ -54,7 +54,7 @@
* TPS6586x has two sets of power supliers:
* + 3 DC/DC converters: DCD0/1/2
* + 11 Regulators: LDO0-9 and RTC_OUT
- * Besides that, TPS6586x has
+ * Besides that, TPS6586x has
* + 2 sets drivers for LED or other open drain outputs
* + 1 dedicated driver for keyboard backlight LED
* + 1 dedicated driver for external vibrator motor
@@ -77,14 +77,11 @@ NvOdmPmuDeviceTPS *hPmu;
#define DUMB_CHARGER_LIMIT_MA 250
#define DEDICATED_CHARGER_LIMIT_MA 1000 // 1000mA for dedicated charger
-#define T_START_TIME 210
-#define K_RAMP 7
-
-/*
+/*
Only 4 options for charger current; Page36
According to TPS658x spec, the charge current = scaling factor / R_ISET.
From the schematic, R_ISET shows "1K". So the charge current = scaling factor.
- Because the min value of the scaling factor is 0.25 and the R_ISET is fixed,
+ Because the min value of the scaling factor is 0.25 and the R_ISET is fixed,
the min charging current = 0.25 / 1 = 0.25 A = 250 mA.
Thus, it will only support 1000mA, 750mA, 500mA, 250mA.
TODO: In future, we need to change to the actual R_IST value
@@ -98,6 +95,7 @@ NvOdmPmuDeviceTPS *hPmu;
/* Valtage tables for LDOs */
/* FIXME: Modify those tables according to your fuse */
static const NvU32 VLDOx[] = {1250, 1500, 1800, 2500, 2700, 2850, 3100, 3300};
+
static const NvU32 VLDO2[] = { 725, 750, 775, 800, 825, 850, 875, 900,
925, 950, 975, 1000, 1025, 1050, 1075, 1100,
1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
@@ -131,7 +129,6 @@ typedef struct TPS6586xPmuSupplyInfoRec
NvOdmPmuVddRailCapabilities cap;
-
} TPS6586xPmuSupplyInfo;
static NvU32 TPS6586xPmuVoltageGetSM0(const NvU32 bits);
@@ -166,8 +163,8 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_DCD0,
- {TPS6586x_R26_SM0V1, 0, 5, 0},
- {TPS6586x_R10_SUPPLYENA, 1, 1, TPS6586x_R11_SUPPLYENB},
+ {TPS6586x_R26_SM0V1, 0, 5, 0},
+ {TPS6586x_R10_SUPPLYENA, 1, 1, TPS6586x_R11_SUPPLYENB},
TPS6586xPmuVoltageGetSM0,
TPS6586xPmuVoltageSetSM0,
NULL,
@@ -175,11 +172,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
- 625, 25, 2700, 1200
-#else
- 900, 25, 1200, 1200
-#endif
+ 625, 25, 2700, 1200
},
},
@@ -193,13 +186,10 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
TPS6586xPmuVoltageSetSM1,
NULL,
TPS6586x_RFF_INVALID,
+
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
625, 25, 2700, 1000
-#else
- 1800, 0, 1800, 1800
-#endif
},
},
@@ -207,85 +197,67 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_DCD2,
- {TPS6586x_R42_SUPPLYV2, 0, 5, 0},
- {TPS6586x_R12_SUPPLYENC, 7, 1, TPS6586x_R13_SUPPLYEND},
+ {TPS6586x_R42_SUPPLYV2, 0, 5, 0},
+ {TPS6586x_R12_SUPPLYENC, 7, 1, TPS6586x_R13_SUPPLYEND},
TPS6586xPmuVoltageGetSM2,
TPS6586xPmuVoltageSetSM2,
NULL,
TPS6586x_RFF_INVALID,
+
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
3000, 50, 4550, 3700
-#else
- 3000, 50, 4550, 3250 // fixme
-#endif
},
},
// LD00
{
TPS6586xPmuSupply_LDO0,
-
+
{TPS6586x_R41_SUPPLYV1, 5, 3, 0},
{TPS6586x_R12_SUPPLYENC, 0, 1, TPS6586x_R13_SUPPLYEND},
TPS6586xPmuVoltageGetVLDOx,
TPS6586xPmuVoltageSetVLDOx,
NULL,
TPS6586x_RFF_INVALID,
-
+
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 3300
-#else
- 2800, 0, 2800, 2800
-#endif
},
},
// LD01 - V-1V2
{
TPS6586xPmuSupply_LDO1,
-
+
{TPS6586x_R41_SUPPLYV1, 0, 5, 0},
{TPS6586x_R12_SUPPLYENC, 1, 1, TPS6586x_R13_SUPPLYEND},
TPS6586xPmuVoltageGetVLDO1,
TPS6586xPmuVoltageSetVLDO1,
NULL,
TPS6586x_RFF_INVALID,
+
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
725, 25, 1500, 1100
-#else
- 1200, 0, 1200, 1200
-#endif
},
},
//LD02 - V-RTC
{
TPS6586xPmuSupply_LDO2,
-
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+
{TPS6586x_R2F_LDO2BV1, 0, 5, 0},
-#else
- {TPS6586x_R29_LDO2AV1, 0, 5, 0},
-#endif
{TPS6586x_R10_SUPPLYENA, 2, 2, TPS6586x_R11_SUPPLYENB},
TPS6586xPmuVoltageGetVLDO2,
TPS6586xPmuVoltageSetVLDO2,
NULL,
TPS6586x_RFF_INVALID,
-
+
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
- 725, 25, 1500, 1200
-#else
- 900, 25, 1200, 1200
-#endif
+ 725, 25, 1500, 1200
},
},
@@ -302,11 +274,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 3300
-#else
- 1800, 0, 1800, 1800
-#endif
},
},
@@ -322,14 +290,10 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
TPS6586x_RFF_INVALID,
{
- NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+ NV_FALSE,
1700, 25, 2000, 1800
-#else
- 1800, 0, 1800, 1800
-#endif
},
- },
+ },
//LDO5
{
@@ -344,18 +308,14 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 2850
-#else
- 2800, 0, 2800, 2800
-#endif
- },
+ },
},
//LDO6 - V-3V3 USB
{
TPS6586xPmuSupply_LDO6,
-
+
{TPS6586x_R43_SUPPLYV3, 0, 3, 0},
{TPS6586x_R12_SUPPLYENC, 4, 1, TPS6586x_R13_SUPPLYEND},
TPS6586xPmuVoltageGetVLDOx,
@@ -365,12 +325,8 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 2850
-#else
- 3300, 0, 3300, 3300
-#endif
- },
+ },
},
//LDO7 - V-SDIO
@@ -386,15 +342,11 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 3300
-#else
- 2800, 0, 2800, 2800
-#endif
},
},
- //LDO8 - V-2V8
+ //LDO8 - V-2V8
{
TPS6586xPmuSupply_LDO8,
@@ -407,18 +359,14 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 1800
-#else
- 2800, 0, 2800, 2800
-#endif
},
},
//LDO9
{
- TPS6586xPmuSupply_LDO9,
-
+ TPS6586xPmuSupply_LDO9,
+
{TPS6586x_R46_SUPPLYV6, 3, 3, 0},
{TPS6586x_R14_SUPPLYENE, 7, 1, TPS6586x_RFF_INVALID},
TPS6586xPmuVoltageGetVLDOx,
@@ -428,11 +376,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 2850
-#else
- 2500, 0, 2500, 2500,
-#endif
},
},
@@ -449,11 +393,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
NV_FALSE,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
1250, 25, 3350, 3300
-#else
- 2500, 0, 2500, 2500
-#endif
},
},
@@ -462,7 +402,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_RED1,
- {TPS6586x_R51_RGB1RED, 0, 5, 0},
+ {TPS6586x_R51_RGB1RED, 0, 5, 0},
{TPS6586x_R52_RGB1GREEN, 7, 1, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -477,7 +417,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_GREEN1,
- {TPS6586x_R52_RGB1GREEN, 0, 5, 0},
+ {TPS6586x_R52_RGB1GREEN, 0, 5, 0},
{TPS6586x_R52_RGB1GREEN, 7, 1, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -492,7 +432,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_BLUE1,
- {TPS6586x_R53_RGB1BLUE, 0, 5, 0},
+ {TPS6586x_R53_RGB1BLUE, 0, 5, 0},
{TPS6586x_R52_RGB1GREEN, 7, 1, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -507,7 +447,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_RED2,
- {TPS6586x_R54_RGB2RED, 0, 5, 0},
+ {TPS6586x_R54_RGB2RED, 0, 5, 0},
{TPS6586x_R55_RGB2GREEN, 7, 1, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -522,7 +462,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_GREEN2,
- {TPS6586x_R55_RGB2GREEN, 0, 5, 0},
+ {TPS6586x_R55_RGB2GREEN, 0, 5, 0},
{TPS6586x_R55_RGB2GREEN, 7, 1, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -532,7 +472,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
0, 1, 0x1f, 0
},
},
-
+
//BLUE2
{
TPS6586xPmuSupply_BLUE2,
@@ -582,8 +522,8 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
{
TPS6586xPmuSupply_WHITE_LED,
- {TPS6586x_R58_SM3_SET1, 0, 3, 0},
- {TPS6586x_R57_SM3_SET0, 0, 8, TPS6586x_RFF_INVALID},
+ {TPS6586x_R58_SM3_SET1, 0, 3, 0},
+ {TPS6586x_R57_SM3_SET0, 0, 8, TPS6586x_RFF_INVALID},
NULL, NULL, NULL,
TPS6586x_RFF_INVALID,
@@ -592,7 +532,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
25000, 0, 25000, 0
},
},
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+
{
TPS6586xPmuSupply_SoC,
@@ -602,6 +542,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
TPS6586x_RFF_INVALID,
{NV_FALSE,0,0,0,0},
},
+
// External Supplies
{
@@ -633,6 +574,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
1,
{NV_FALSE,0,1500,1500,1500},
},
+
{
Ext_TPS2051BPmuSupply_VDDIO_VID,
@@ -662,6 +604,7 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
TPS6586x_RFF_INVALID,
{NV_FALSE,0,3300,3300,3300},
},
+
{
Ext_SWITCHPmuSupply_VDD_BL,
@@ -681,7 +624,6 @@ static const TPS6586xPmuSupplyInfo tps6586xSupplyInfoTable[] =
TPS6586x_RFF_INVALID,
{NV_FALSE,0,3300,3300,3300},
}
-#endif
};
static NvU32 TPS6586xPmuVoltageGetSM0(const NvU32 bits)
@@ -695,11 +637,7 @@ static NvU32 TPS6586xPmuVoltageGetSM1(const NvU32 bits)
{
NV_ASSERT(bits <= 0x1F);
-#if defined (CONFIG_TEGRA_ODM_HARMONY)
return (725 + bits * 25);
-#else
- return (1450 + bits * 50);
-#endif
}
static NvU32 TPS6586xPmuVoltageGetSM2(const NvU32 bits)
@@ -722,7 +660,6 @@ static NvU32 TPS6586xPmuVoltageGetVLDO1(const NvU32 bits)
* See pp. 64 - 66 of TPS658621 data sheet.
*/
NV_ASSERT(bits <= 0x1F);
-
return VLDO2[bits];
}
@@ -751,24 +688,17 @@ static NvU32 TPS6586xPmuVoltageSetSM0(const NvU32 millivolts)
static NvU32 TPS6586xPmuVoltageSetSM1(const NvU32 millivolts)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if (millivolts < 725)
return 0;
else
return MIN((millivolts - 725) / 25, 0x1f);
-#else
- if (millivolts < 1450)
- return 0;
- else
- return MIN((millivolts - 1450) / 50, 0x1f);
-#endif
}
static NvU32 TPS6586xPmuVoltageSetSM2(const NvU32 millivolts)
{
if (millivolts < 3000)
return 0;
- else
+ else
return MIN((millivolts - 3000) / 25, 0x1f);
}
@@ -817,12 +747,19 @@ Tps6586xGetCapabilities(
*pCapabilities = tps6586xSupplyInfoTable[vddRail].cap;
}
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
-static NvBool g_ExternalSupplyEnabled[TPS6586x_EXTERNAL_SUPPLY_NUM] = { 0 };
+static NvBool g_ExternalSupplyEnabled[TPS6586x_EXTERNAL_SUPPLY_NUM] = { NV_FALSE, // Ext_TPS62290PmuSupply_BUCK (VDD_1V05: AVDD_PEX...), enabled by PMU_GPIO3
+ NV_FALSE, // Ext_TPS72012PmuSupply_LDO (VDD_1V2: VCORE_WIFI...), enabled by PMU_GPIO2
+ NV_TRUE, // Ext_TPS74201PmuSupply_LDO (VDD_1V5), enabled by PMU_GPIO1
+ NV_FALSE, // Ext_TPS2051BPmuSupply_VDDIO_VID, enabled by AP_GPIO Port T, Pin 2
+ NV_FALSE, // Ext_SWITCHPmuSupply_VDDIO_SD, enabled by AP_GPIO Port T, Pin 3
+ NV_TRUE, // Ext_SWITCHPmuSupply_VDDIO_SDMMC
+ NV_FALSE, // Ext_SWITCHPmuSupply_VDD_BL
+ NV_FALSE // Ext_SWITCHPmuSupply_VDD_PNL
+ };
static NvBool
Tps6586xGetExternalSupply(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvU32 vddRail,
NvU32* pMilliVolts)
{
@@ -833,7 +770,6 @@ Tps6586xGetExternalSupply(
return NV_TRUE;
}
-#endif
static NvBool
Tps6586xReadVoltageReg(
@@ -844,7 +780,6 @@ Tps6586xReadVoltageReg(
const TPS6586xPmuSupplyInfo *pSupplyInfo = &tps6586xSupplyInfoTable[vddRail];
NvU32 data = 0;
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
// External supplies are fixed.
if ((vddRail == Ext_TPS62290PmuSupply_BUCK) ||
(vddRail == Ext_TPS72012PmuSupply_LDO) ||
@@ -860,9 +795,8 @@ Tps6586xReadVoltageReg(
else
return NV_TRUE;
}
-#endif
- if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
+ if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
{
return NV_FALSE;
}
@@ -879,11 +813,10 @@ Tps6586xReadVoltageReg(
data &= (((1<<pSupplyInfo->ctrlRegInfo.bits)-1)<<pSupplyInfo->ctrlRegInfo.start);
if (data == 0)
{
- //since Voltage table is {1250, 1500, 1800, 2500, 2700, 2850, 3100, 3300}
+ //since Voltage table is {1250, 1500, 1800, 2500, 2700, 2850, 3100, 3300}
//need to fill 0 voltage if needed
*pMilliVolts = data;
- }
-
+ }
return NV_TRUE;
}
@@ -891,19 +824,18 @@ Tps6586xReadVoltageReg(
#if 0
static NvBool
Tps6586xSupplyCtrl(
- const NvU32 vddRail,
+ const NvU32 vddRail,
NvBool ctrl)
{
return NV_TRUE;
}
#endif
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
#define NVODM_PORT(x) ((x) - 'a')
static NvBool
Tps6586xSetExternalSupply(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvU32 vddRail,
NvBool Enable)
{
@@ -1005,6 +937,7 @@ Tps6586xSetExternalSupply(
case 3:
if (!Tps6586xI2cRead8(hDevice, TPS6586x_R5D_GPIOSET1, &data))
return NV_FALSE;
+
// Reset mode field
data &= ~(TPS6586x_R5D_GPIOSET1_GPIO3_MODE_MASK <<
TPS6586x_R5D_GPIOSET1_GPIO3_MODE_SHIFT);
@@ -1045,6 +978,7 @@ Tps6586xSetExternalSupply(
// Switched by AP GPIO
else
{
+ const NvOdmPeripheralConnectivity *vdd = NULL;
// Open GPIO
if (!hPmu->hGpio)
{
@@ -1053,39 +987,12 @@ Tps6586xSetExternalSupply(
if (!hPmu->hGpio)
return NV_FALSE;
}
-
- // Get AP GPIO pin assigned to the respective voltage rail
- // FIXME: This should be driven by supply info table.
- switch (vddRail)
- {
- case Ext_TPS2051BPmuSupply_VDDIO_VID:
- GpioPort = NVODM_PORT('t');
- GpioPin = 2;
- break;
-
- case Ext_SWITCHPmuSupply_VDDIO_SD:
- GpioPort = NVODM_PORT('t');
- GpioPin = 3;
- break;
-
- case Ext_SWITCHPmuSupply_VDDIO_SDMMC:
- GpioPort = NVODM_PORT('i');
- GpioPin = 6;
- break;
-
- case Ext_SWITCHPmuSupply_VDD_BL:
- GpioPort = NVODM_PORT('w');
- GpioPin = 0;
- break;
-
- case Ext_SWITCHPmuSupply_VDD_PNL:
- GpioPort = NVODM_PORT('c');
- GpioPin = 6;
- break;
-
- default:
+ vdd = NvOdmPeripheralGetGuid(TPS_EXT_GUID(vddRail));
+ if (!vdd)
return NV_FALSE;
- }
+
+ GpioPort = vdd->AddressList[0].Instance;
+ GpioPin = vdd->AddressList[0].Address;
NV_ASSERT((NVODM_EXT_AP_GPIO_RAIL(vddRail) >= 0) &&
(NVODM_EXT_AP_GPIO_RAIL(vddRail) < TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM));
@@ -1093,7 +1000,7 @@ Tps6586xSetExternalSupply(
// Acquire Pin Handle
if (!hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)])
{
- hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)] =
+ hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)] =
NvOdmGpioAcquirePinHandle(hPmu->hGpio, GpioPort, GpioPin);
if (!hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)])
@@ -1121,15 +1028,13 @@ Tps6586xSetExternalSupply(
}
else
{
- if (vddRail != Ext_TPS2051BPmuSupply_VDDIO_VID)
- {
NvOdmGpioSetState(hPmu->hGpio,
hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)],
NvOdmGpioPinActiveState_Low);
+
NvOdmGpioConfig(hPmu->hGpio,
hPmu->hPin[NVODM_EXT_AP_GPIO_RAIL(vddRail)],
NvOdmGpioPinMode_Output);
- }
}
}
@@ -1144,26 +1049,20 @@ Tps6586xSetExternalSupply(
}
return NV_TRUE;
}
-#endif
-static NvBool
+static NvBool
Tps6586xWriteVoltageReg(
- NvOdmPmuDeviceHandle hDevice,
- NvU32 vddRail,
- NvU32 MilliVolts,
+ NvOdmPmuDeviceHandle hDevice,
+ NvU32 vddRail,
+ NvU32 MilliVolts,
NvU32* pSettleMicroSeconds)
{
const TPS6586xPmuSupplyInfo* pSupplyInfo = &tps6586xSupplyInfoTable[vddRail];
//const TPS6586xPmuSupplyInfo* pSupplyInputInfo = &tps6586xSupplyInfoTable[pSupplyInfo->supplyInput];
NvBool status = NV_FALSE;
- NvU32 settleTime = 0;
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- NvU32 volChange = 0;
-#endif
NV_ASSERT(pSupplyInfo->supply == (TPS6586xPmuSupply)vddRail);
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if ((vddRail != Ext_TPS62290PmuSupply_BUCK) &&
(vddRail != Ext_TPS72012PmuSupply_LDO) &&
(vddRail != Ext_TPS74201PmuSupply_LDO) &&
@@ -1172,28 +1071,22 @@ Tps6586xWriteVoltageReg(
(vddRail != Ext_SWITCHPmuSupply_VDDIO_SDMMC) &&
(vddRail != Ext_SWITCHPmuSupply_VDD_BL) &&
(vddRail != Ext_SWITCHPmuSupply_VDD_PNL))
-#endif
{
if (pSupplyInfo->ctrlRegInfo.addr == TPS6586x_RFF_INVALID)
{
NVODMPMU_PRINTF(("TPS:The required ctrl register address is INVALID...\n"));
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
return NV_TRUE;
//return NV_FALSE;
-#else
- return NV_FALSE;
-#endif
}
}
- if (MilliVolts == ODM_VOLTAGE_OFF)
+ if (MilliVolts == ODM_VOLTAGE_OFF)
{
NvU32 data = 0;
// check if the supply can be turned off
//NV_ASSERT(hDevice->supplyRefCntTable[vddRail]);
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
// Disable external supplies
if ((vddRail == Ext_TPS62290PmuSupply_BUCK) ||
(vddRail == Ext_TPS72012PmuSupply_LDO) ||
@@ -1204,107 +1097,69 @@ Tps6586xWriteVoltageReg(
(vddRail == Ext_SWITCHPmuSupply_VDD_BL) ||
(vddRail == Ext_SWITCHPmuSupply_VDD_PNL))
{
- status = Tps6586xSetExternalSupply(hDevice, vddRail, NV_FALSE);
+ if (((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail] == 1)
+ {
+ /* Disable */
+ NvOdmServicesPmuSetSocRailPowerState(
+ ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice, pSupplyInfo->supply, NV_FALSE);
+ status = Tps6586xSetExternalSupply(hDevice, vddRail, NV_FALSE);
+ }
}
- else
-#endif
- if (((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail] == 1)
+ else if ((((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail] == 1) || (vddRail == TPS6586xPmuSupply_SoC))
{
/* Disable */
NvOdmServicesPmuSetSocRailPowerState(
- ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice, pSupplyInfo->supply, NV_FALSE);
+ ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice, pSupplyInfo->supply, NV_FALSE);
Tps6586xI2cRead8(hDevice, pSupplyInfo->ctrlRegInfo.addr, &data);
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if (vddRail == TPS6586xPmuSupply_SoC)
{
// SOC Super power rail don't hold the sleep bit
data |= (((1<<pSupplyInfo->ctrlRegInfo.bits)-1)<<pSupplyInfo->ctrlRegInfo.start);
}
else
-#endif
{
data &= ~(((1<<pSupplyInfo->ctrlRegInfo.bits)-1)<<pSupplyInfo->ctrlRegInfo.start);
}
status = Tps6586xI2cWrite8(hDevice, pSupplyInfo->ctrlRegInfo.addr, data);
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if (vddRail == TPS6586xPmuSupply_SoC)
{
// Wait 10 secs for PMU to shutdown
NvOdmOsWaitUS(100000000);
}
-#endif
if (status && (pSupplyInfo->ctrlRegInfo.flag != TPS6586x_RFF_INVALID))
{
status = Tps6586xI2cRead8(hDevice, pSupplyInfo->ctrlRegInfo.flag, &data);
- if (status)
+ if (status)
{
data &= ~(((1<<pSupplyInfo->ctrlRegInfo.bits)-1)<<pSupplyInfo->ctrlRegInfo.start);
status = Tps6586xI2cWrite8(hDevice, pSupplyInfo->ctrlRegInfo.flag, data);
+ if (NV_FALSE == status)
+ NVODMPMU_PRINTF(("TPS:Writing to PMU I2C fails 2... ctrlRegInfo.flag??: %d\n", pSupplyInfo->ctrlRegInfo.flag));
}
}
/* Reset to voltage to 0th */
MilliVolts = 0;
-
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- // Calcuate this voltage change
- volChange = ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail];
-
- ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail] = 0;
-
- // DCD0/DCD1/DCD2
- if ((vddRail == TPS6586xPmuSupply_DCD0) ||
- (vddRail == TPS6586xPmuSupply_DCD1) ||
- (vddRail == TPS6586xPmuSupply_DCD2))
- {
- // delay = Tstart(210) + Voltage change/Kramp
- settleTime = T_START_TIME + volChange/K_RAMP;
- }
- else if ((vddRail == TPS6586xPmuSupply_LDO2) ||
- (vddRail == TPS6586xPmuSupply_LDO4))
- {
- // Voltage change/Kramp
- settleTime = volChange/K_RAMP;
- }
- else
- {
- settleTime = 0;
- }
-#endif
}
if (((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail] != 0)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if(--((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail] != 0)
{
- if (pSettleMicroSeconds)
+ if(pSettleMicroSeconds)
*pSettleMicroSeconds = 0;
return NV_TRUE;
}
-#else
- --((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail];
-#endif
}
-
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- if (pSettleMicroSeconds != NULL)
- *pSettleMicroSeconds = settleTime;
- else
- NvOdmOsWaitUS(settleTime);
-
- return NV_TRUE;
-#endif
}
else
- {
+ {
NvU32 data = 0;
if (((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->supplyRefCntTable[vddRail]++ == 0)
{
// Enable external supplies
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
if ((vddRail == Ext_TPS62290PmuSupply_BUCK) ||
(vddRail == Ext_TPS72012PmuSupply_LDO) ||
(vddRail == Ext_TPS74201PmuSupply_LDO) ||
@@ -1314,36 +1169,37 @@ Tps6586xWriteVoltageReg(
(vddRail == Ext_SWITCHPmuSupply_VDD_BL) ||
(vddRail == Ext_SWITCHPmuSupply_VDD_PNL))
{
- status = Tps6586xSetExternalSupply(hDevice, vddRail, NV_TRUE);
+ /* Enable */
+ if (g_ExternalSupplyEnabled[vddRail - (NvU32)(Ext_TPS62290PmuSupply_BUCK)] == NV_FALSE)
+ {
+ NvOdmServicesPmuSetSocRailPowerState(
+ ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice,
+ pSupplyInfo->supply, NV_TRUE);
+
+ status = Tps6586xSetExternalSupply(hDevice, vddRail, NV_TRUE);
+ }
}
else
-#endif
{
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- NvOdmServicesPmuSetSocRailPowerState(
- ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice, pSupplyInfo->supply, NV_TRUE);
-#endif
status = Tps6586xI2cRead8(hDevice, pSupplyInfo->ctrlRegInfo.addr, &data);
if (status && ((data >> pSupplyInfo->ctrlRegInfo.start) & 0x1) == 0)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
/* Enable */
NvOdmServicesPmuSetSocRailPowerState(
((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->hOdmPmuSevice,
pSupplyInfo->supply, NV_TRUE);
-#endif
data |= (((1<<pSupplyInfo->ctrlRegInfo.bits)-1)<<pSupplyInfo->ctrlRegInfo.start);
if (NV_FALSE == Tps6586xI2cWrite8(hDevice, pSupplyInfo->ctrlRegInfo.addr, data))
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+ {
+ NVODMPMU_PRINTF(("TPS:Writing to PMU I2C fails 1... ctrladdress: %d\n", pSupplyInfo->ctrlRegInfo.addr));
return NV_TRUE;
-#else
- return NV_FALSE;
-#endif
+ //return NV_FALSE;
+ }
}
}
}
- /* Disable Flash mode
+ /* Disable Flash mode
* FIXME: please check whether you need to disable flash */
/*
if (vddRail == TPS6586xPmuSupply_RED1 ||
@@ -1352,42 +1208,26 @@ Tps6586xWriteVoltageReg(
{
if (NV_FALSE == Tps6586xI2cWrite8(hDevice, TPS6586x_R50_RGB1FLASH, 0xFF))
return NV_FALSE;
- }
+ }
*/
}
- if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
+ if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+ NVODMPMU_PRINTF(("TPS:The required supply register address is INVALID...\n", pSupplyInfo->supplyRegInfo.addr));
return NV_TRUE;
-#else
- return NV_FALSE;
-#endif
+ //return NV_FALSE;
}
else
{
const int bits = pSupplyInfo->setVoltage ? pSupplyInfo->setVoltage(MilliVolts) : MilliVolts;
NvU32 data = 0;
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
status = Tps6586xI2cRead8(hDevice, pSupplyInfo->supplyRegInfo.addr, &data);
if (NV_FALSE == status)
NVODMPMU_PRINTF(("TPS:Writing to PMU I2C fails 1... supplyaddress: %d\n", pSupplyInfo->supplyRegInfo.addr));
-#else
- if ((vddRail == TPS6586xPmuSupply_DCD0) ||
- (vddRail == TPS6586xPmuSupply_DCD1) ||
- (vddRail == TPS6586xPmuSupply_LDO4) ||
- (vddRail == TPS6586xPmuSupply_LDO2))
- {
- status = NV_TRUE;
- }
- else
- {
- status = Tps6586xI2cRead8(hDevice, pSupplyInfo->supplyRegInfo.addr, &data);
- }
-#endif
- if (status)
+ if (status)
{
data &= ~(((1<<pSupplyInfo->supplyRegInfo.bits)-1)<<pSupplyInfo->supplyRegInfo.start);
data |= (bits << pSupplyInfo->supplyRegInfo.start);
@@ -1400,7 +1240,7 @@ Tps6586xWriteVoltageReg(
(vddRail == TPS6586xPmuSupply_LDO2))
{
data = 0;
- switch (vddRail)
+ switch (vddRail)
{
case TPS6586xPmuSupply_LDO2:
data |= (1<<4);
@@ -1423,65 +1263,31 @@ Tps6586xWriteVoltageReg(
break;
}
status = Tps6586xI2cWrite8(hDevice, TPS6586x_R20_VCC1, data);
+ if (NV_FALSE == status)
+ NVODMPMU_PRINTF(("TPS:Writing to PMU I2C fails ... TPS6586x_R20_VCC1\n"));
}
-
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- // Calcuate this voltage change
- if (((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail] < MilliVolts)
- volChange = MilliVolts - ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail];
- else
- volChange = ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail] - MilliVolts;
-
- ((NvOdmPmuDeviceTPS *)(hDevice->pPrivate))->curVoltageTable[vddRail] = MilliVolts;
-
- // DCD0/DCD1/DCD2
- if ((vddRail == TPS6586xPmuSupply_DCD0) ||
- (vddRail == TPS6586xPmuSupply_DCD1) ||
- (vddRail == TPS6586xPmuSupply_DCD2))
- {
- // delay = Tstart(210) + Voltage change/Kramp
- settleTime = T_START_TIME + volChange/K_RAMP;
- }
- else if ((vddRail == TPS6586xPmuSupply_LDO2) ||
- (vddRail == TPS6586xPmuSupply_LDO4))
- {
- // Voltage change/Kramp
- settleTime = volChange/K_RAMP;
- }
- else
- {
- settleTime = 0;
- }
-#else
- settleTime = 250;
-#endif
-
+
if (pSettleMicroSeconds)
- *pSettleMicroSeconds = settleTime;
+ *pSettleMicroSeconds = 250;
else
- NvOdmOsWaitUS(settleTime);
+ NvOdmOsWaitUS(250);
+
return status;
}
}
- if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
+ if (pSupplyInfo->supplyRegInfo.addr == TPS6586x_RFF_INVALID)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+ NVODMPMU_PRINTF(("TPS:The required supply register 2 address is INVALID... %d\n", pSupplyInfo->supplyRegInfo.addr));
return NV_TRUE;
-#else
- return NV_FALSE;
-#endif
+ //return NV_FALSE;
}
if (pSettleMicroSeconds)
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
*pSettleMicroSeconds = 250;
else
NvOdmOsWaitUS(250);
-#else
- *pSettleMicroSeconds = 0;
-#endif
-
+
return NV_TRUE;
}
@@ -1490,14 +1296,14 @@ Tps6586xGetVoltage(
NvOdmPmuDeviceHandle hDevice,
NvU32 vddRail,
NvU32* pMilliVolts)
-{
+{
NV_ASSERT(hDevice);
NV_ASSERT(pMilliVolts);
NV_ASSERT(vddRail < TPS6586xPmuSupply_Num);
if(! Tps6586xReadVoltageReg(hDevice, vddRail,pMilliVolts))
return NV_FALSE;
-
+
return NV_TRUE;
}
@@ -1516,7 +1322,7 @@ Tps6586xSetVoltage(
if (tps6586xSupplyInfoTable[vddRail].cap.OdmProtected == NV_TRUE)
{
- NVODMPMU_PRINTF(("The voltage is protected and can not be set.\n"));
+ NVODMPMU_PRINTF(("TPS:The voltage is protected and can not be set.\n"));
return NV_TRUE;
}
@@ -1525,17 +1331,16 @@ Tps6586xSetVoltage(
(MilliVolts >= tps6586xSupplyInfoTable[vddRail].cap.MinMilliVolts)))
{
if (! Tps6586xWriteVoltageReg(hDevice, vddRail, MilliVolts, pSettleMicroSeconds))
+ {
+ NVODMPMU_PRINTF(("TPS:Tps6586xWriteVoltageReg fails\n"));
return NV_FALSE;
+ }
}
else
{
- NVODMPMU_PRINTF(("The required voltage is not supported..\n"));
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+ NVODMPMU_PRINTF(("TTPS:he required voltage is not supported..vddRail: %d, MilliVolts: %d\n", vddRail, MilliVolts));
return NV_TRUE;
//return NV_FALSE;
-#else
- return NV_FALSE;
-#endif
}
return NV_TRUE;
@@ -1546,7 +1351,7 @@ void DumpTps6586x(NvOdmPmuDeviceHandle hDevice)
{
int i;
NvU32 data;
- for (i=0; i<0xFF; i++)
+ for (i=0; i<0xFF; i++)
{
data = 0;
Tps6586xI2cRead8(hDevice, i, &data);
@@ -1561,14 +1366,13 @@ NvBool Tps6586xSetup(NvOdmPmuDeviceHandle hDevice)
NvU32 I2cInstance = 0;
NvU32 I2cAddress = 0;
NvBool status = NV_FALSE;
- NvU32 data = 0;
// static TPS6586xDevice s_tps6586x = {0};
-
- const NvOdmPeripheralConnectivity *pConnectivity =
+
+ const NvOdmPeripheralConnectivity *pConnectivity =
NvOdmPeripheralGetGuid(PMUGUID);
NV_ASSERT(hDevice);
-
+
hPmu = (NvOdmPmuDeviceTPS *)NvOdmOsAlloc(sizeof(NvOdmPmuDeviceTPS));
if (hPmu == NULL)
{
@@ -1583,7 +1387,7 @@ NvBool Tps6586xSetup(NvOdmPmuDeviceHandle hDevice)
{
NvU32 i = 0;
pmuPresented = NV_TRUE;
-
+
for (i = 0; i < pConnectivity->NumAddress; i ++)
{
if (pConnectivity->AddressList[i].Interface == NvOdmIoModule_I2c_Pmu)
@@ -1607,19 +1411,17 @@ NvBool Tps6586xSetup(NvOdmPmuDeviceHandle hDevice)
}
hPmu->DeviceAddr = I2cAddress;
hPmu->hOdmPmuSevice = NvOdmServicesPmuOpen();
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
//if (NV_FALSE == Tps6586xWriteVoltageReg(hDevice, TPS6586xPmuSupply_LDO5, 3300, NULL))
if (NV_FALSE == Tps6586xWriteVoltageReg(hDevice, TPS6586xPmuSupply_LDO5, 2850, NULL))
NVODMPMU_PRINTF(("TPS: Fail to set the NVDDIO_NAND to 2.85V\n"));
else
NVODMPMU_PRINTF(("TPS: set the NVDDIO_NAND to 2.85V\n"));
-#endif
- }
+ }
else
{
// if PMU is not presented in the database, then the platform is PMU-less.
- NVODMPMU_PRINTF(("[NVODM PMU]Tps6586xSetup: The system did not doscover PMU fromthe data base. \n"));
- NVODMPMU_PRINTF(("[NVODM PMU]Tps6586xSetup: If this is not intended, please check the peripheral database for PMU settings. \n"));
+ NVODMPMU_PRINTF(("[NVODM PMU]Tps6586xSetup: The system did not doscover PMU fromthe data base. \n"));
+ NVODMPMU_PRINTF(("[NVODM PMU]Tps6586xSetup: If this is not intended, please check the peripheral database for PMU settings. \n"));
//uncomment below line if you really need to run pmu adaptation on pmu-less system.
// the system will run in pmu-less mode.
@@ -1640,37 +1442,18 @@ NvBool Tps6586xSetup(NvOdmPmuDeviceHandle hDevice)
}
#endif
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
- /* Initialize the refcont of the rails which are ON by default */
- hPmu->supplyRefCntTable[TPS6586xPmuSupply_SoC] = 1;
-#endif
-
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- // If your project doesn't use this GPIO, please delete them!
- // Enable GPIO3 to HIGH
- // Set GPIO Configure to output
- data = 0x10;
- if (!Tps6586xI2cWrite8(hDevice, TPS6586x_R5D_GPIOSET1, data))
- return NV_FALSE;
-
- // Set GPIO to HI, NON-Inverting
- data = 0x04;
- if (!Tps6586xI2cWrite8(hDevice, TPS6586x_R5E_GPIOSET2, data))
- return NV_FALSE;
-#endif
-
//NvOdmOsMemset(&s_tps6586x, 0, sizeof(s_tps6586x));
//s_tps6586x.pmuPresented = NV_TRUE;
pmuPresented = NV_TRUE;
#if NV_DEBUG
//DumpTps6586x(hDevice);
-#endif
+#endif
if (!Tps6586xBatteryChargerSetup(hDevice))
return NV_FALSE;
- // The interrupt assumes not supported until tps6586xInterruptHandler() is called.
+ // The interrupt assumes not supported until tps6586xInterruptHandler() is called.
pmuInterruptSupported = NV_FALSE;
// setup the interrupt any way.
@@ -1680,12 +1463,12 @@ NvBool Tps6586xSetup(NvOdmPmuDeviceHandle hDevice)
//Check battery presence
if (!Tps6586xBatteryChargerCBCMainBatt(hDevice, &battPresence))
return NV_FALSE;
-
+
// Check battery Fullness
if (battPresence == NV_TRUE)
- {
+ {
if (!Tps6586xBatteryChargerCBCBattFul(hDevice, &status))
- return NV_FALSE;
+ return NV_FALSE;
pmuStatus.batFull = status;
}
else
@@ -1702,9 +1485,8 @@ OPEN_FAILED:
void Tps6586xRelease(NvOdmPmuDeviceHandle hDevice)
{
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
NvU32 i;
-#endif
+
if (hDevice != NULL && hPmu->hOdmI2C)
{
NvOdmServicesPmuClose(hPmu->hOdmPmuSevice);
@@ -1714,16 +1496,13 @@ void Tps6586xRelease(NvOdmPmuDeviceHandle hDevice)
NvOdmOsFree(hPmu);
hPmu = NULL;
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
-
// Release & Close the GPIOs
for (i=0; i<(TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM); i++)
{
NvOdmGpioReleasePinHandle(hPmu->hGpio, hPmu->hPin[i]);
}
NvOdmGpioClose(hPmu->hGpio);
-#endif
- }
+ }
}
NvBool
@@ -1732,10 +1511,10 @@ Tps6586xGetAcLineStatus(
NvOdmPmuAcLineStatus *pStatus)
{
NvBool acLineStatus = NV_FALSE;
-
+
NV_ASSERT(hDevice);
NV_ASSERT(pStatus);
-
+
// check if charger presents
if (battPresence == NV_FALSE)
{
@@ -1769,18 +1548,18 @@ Tps6586xGetAcLineStatus(
*pStatus = NvOdmPmuAcLine_Online;
else
*pStatus = NvOdmPmuAcLine_Offline;
- }
+ }
return NV_TRUE;
}
-NvBool
+NvBool
Tps6586xGetBatteryStatus(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvOdmPmuBatteryInstance batteryInst,
NvU8 *pStatus)
{
NvU8 status = 0;
-
+
NV_ASSERT(hDevice);
NV_ASSERT(pStatus);
NV_ASSERT(batteryInst <= NvOdmPmuBatteryInst_Num);
@@ -1793,7 +1572,7 @@ Tps6586xGetBatteryStatus(
NvU32 VBatSense = 0;
if (!Tps6586xGetAcLineStatus(hDevice, &stat))
return NV_FALSE;
-
+
if (stat == NvOdmPmuAcLine_Online)
{
if (pmuInterruptSupported == NV_TRUE)
@@ -1803,36 +1582,35 @@ Tps6586xGetBatteryStatus(
}
else
{
- NvBool batFull = NV_FALSE;
+ NvBool batFull = NV_FALSE;
if (!Tps6586xBatteryChargerCBCBattFul(hDevice, &batFull))
return NV_FALSE;
if (batFull == NV_FALSE)
status = NVODM_BATTERY_STATUS_CHARGING;
}
}
-
+
// Get VBatSense
if (!Tps6586xAdcVBatSenseRead(hDevice, &VBatSense))
return NV_FALSE;
if (VBatSense > NVODM_BATTERY_HIGH_VOLTAGE_MV) // maybe modify these parameters
status |= NVODM_BATTERY_STATUS_HIGH;
- else if ((VBatSense < NVODM_BATTERY_LOW_VOLTAGE_MV)&&
+ else if ((VBatSense < NVODM_BATTERY_LOW_VOLTAGE_MV)&&
(VBatSense > NVODM_BATTERY_CRITICAL_VOLTAGE_MV))
status |= NVODM_BATTERY_STATUS_LOW;
else if (VBatSense <= NVODM_BATTERY_CRITICAL_VOLTAGE_MV)
status |= NVODM_BATTERY_STATUS_CRITICAL;
-
+
}
else
{
- /* Battery is actually not present */
status = NVODM_BATTERY_STATUS_NO_BATTERY;
}
*pStatus = status;
- }
- else
+ }
+ else
{
*pStatus = NVODM_BATTERY_STATUS_UNKNOWN;
}
@@ -1842,12 +1620,12 @@ Tps6586xGetBatteryStatus(
NvBool
Tps6586xGetBatteryData(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvOdmPmuBatteryInstance batteryInst,
NvOdmPmuBatteryData *pData)
{
NvOdmPmuBatteryData batteryData;
-
+
batteryData.batteryLifePercent = NVODM_BATTERY_DATA_UNKNOWN;
batteryData.batteryLifeTime = NVODM_BATTERY_DATA_UNKNOWN;
batteryData.batteryVoltage = NVODM_BATTERY_DATA_UNKNOWN;
@@ -1870,7 +1648,7 @@ Tps6586xGetBatteryData(
if (battPresence == NV_TRUE)
{
/* retrieve Battery voltage and temperature */
-
+
// Get VBatSense
if (!Tps6586xAdcVBatSenseRead(hDevice, &VBatSense))
{
@@ -1888,7 +1666,7 @@ Tps6586xGetBatteryData(
batteryData.batteryVoltage = VBatSense;
batteryData.batteryTemperature = Tps6586xBatteryTemperature(VBatSense, VBatTemp);
}
-
+
*pData = batteryData;
}
else
@@ -1901,7 +1679,7 @@ Tps6586xGetBatteryData(
void
Tps6586xGetBatteryFullLifeTime(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvOdmPmuBatteryInstance batteryInst,
NvU32 *pLifeTime)
{
@@ -1910,7 +1688,7 @@ Tps6586xGetBatteryFullLifeTime(
void
Tps6586xGetBatteryChemistry(
- NvOdmPmuDeviceHandle hDevice,
+ NvOdmPmuDeviceHandle hDevice,
NvOdmPmuBatteryInstance batteryInst,
NvOdmPmuBatteryChemistry *pChemistry)
{
@@ -1918,7 +1696,7 @@ Tps6586xGetBatteryChemistry(
}
-NvBool
+NvBool
Tps6586xSetChargingCurrent(
NvOdmPmuDeviceHandle hDevice,
NvOdmPmuChargingPath chargingPath,
@@ -1963,7 +1741,7 @@ Tps6586xSetChargingCurrent(
break;
}
}
-
+
if (chargingCurrentLimitMa >= MAX_CHARGING_CURRENT)
{
data = data & 0xf3;
@@ -1985,15 +1763,15 @@ Tps6586xSetChargingCurrent(
chargingCurrentLimitMa = 0;
}
- //data = (NvU8)((( chargingCurrentLimitMa << 8 ) - chargingCurrentLimitMa )
+ //data = (NvU8)((( chargingCurrentLimitMa << 8 ) - chargingCurrentLimitMa )
// / CHARGER_CONSTANT_CURRENT_SET_MA );
if (!Tps6586xI2cWrite8(hDevice, TPS6586x_R49_CHG1, data))
return NV_FALSE;
-
+
if (!Tps6586xI2cRead8(hDevice, TPS6586x_R4A_CHG2, &data))
return NV_FALSE;
-
+
if (chargingCurrentLimitMa == 0)
{
data = data & 0xfd; // Disable charging!
@@ -2012,10 +1790,10 @@ void Tps6586xInterruptHandler( NvOdmPmuDeviceHandle hDevice)
{
//TPS6586xHandle tps6586x = hDevice->priv;
//tps6586x->pmuStatus.batFull = NV_FALSE;
-
+
// If the interrupt handle is called, the interrupt is supported.
pmuInterruptSupported = NV_TRUE;
-
+
Tps6586xInterruptHandler_int(hDevice, &pmuStatus);
}
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.h b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.h
index 0c1f4fb2b9af..ee25ecca8684 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.h
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x.h
@@ -56,27 +56,19 @@ typedef struct NvOdmPmuDeviceTPSRec
/* The odm pmu service handle */
NvOdmServicesPmuHandle hOdmPmuSevice;
+
+ /* Gpio Handles (for external supplies) */
+ NvOdmServicesGpioHandle hGpio;
+ NvOdmGpioPinHandle hPin[TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM];
+
/* the PMU I2C device Address */
NvU32 DeviceAddr;
/* Device's private data */
void *priv;
-
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
- /* Gpio Handles (for external supplies) */
- NvOdmServicesGpioHandle hGpio;
- NvOdmGpioPinHandle hPin[TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM];
-#else
- /* The current voltage */
- NvU32 curVoltageTable[VRAILCOUNT];
-#endif
/* The ref cnt table of the power supplies */
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
NvU32 supplyRefCntTable[TPS6586xPmuSupply_Num];
-#else
- NvU32 supplyRefCntTable[VRAILCOUNT];
-#endif
} NvOdmPmuDeviceTPS;
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_i2c.h b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_i2c.h
index df17ff6c2cf0..f9ba7ba61df8 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_i2c.h
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_i2c.h
@@ -41,7 +41,7 @@ extern "C"
#endif
// Constant definition
-#define TPS6586x_I2C_SPEED_KHZ 100
+#define TPS6586x_I2C_SPEED_KHZ 400
// Function declaration
NvBool Tps6586xI2cWrite8(
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_interrupt.c b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_interrupt.c
index b3ac0b954a4e..a9b6e4a89c31 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_interrupt.c
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_interrupt.c
@@ -128,9 +128,6 @@ void Tps6586xInterruptHandler_int(NvOdmPmuDeviceHandle hDevice,
if (data&0xc0)
{
pmuStatus->mChgPresent = NV_TRUE;
-#if !defined(CONFIG_TEGRA_ODM_HARMONY)
- NvOdmEnableOtgCircuitry(NV_TRUE);
-#endif
}
}
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_supply_info_table.h b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_supply_info_table.h
index fe34d3a02ca1..ec5d690df58f 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_supply_info_table.h
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/nvodm_pmu_tps6586x_supply_info_table.h
@@ -40,41 +40,8 @@ extern "C"
#define PMUGUID NV_ODM_GUID('t','p','s','6','5','8','6','x')
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
-
-/// The total number of external supplies (which use both AP and PMU GPIOs)
-#define TPS6586x_EXTERNAL_SUPPLY_NUM \
- (NvU32)(TPS6586xPmuSupply_Num - Ext_TPS62290PmuSupply_BUCK)
-
-/// Macro for converting a vddRail to AP GPIO pin index.
-#define NVODM_EXT_AP_GPIO_RAIL(x) ((x) - Ext_TPS2051BPmuSupply_VDDIO_VID)
-
-/// The total number of external supplies which use AP GPIO pins for enable
-#define TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM \
- (NvU32)NVODM_EXT_AP_GPIO_RAIL(TPS6586xPmuSupply_Num)
-
-#else
-
-/* FIXME: modify this table according to your schematics */
-#define V_CORE TPS6586xPmuSupply_DCD0
-#define V_1V8 TPS6586xPmuSupply_DCD1
-#define LCD_2V8 TPS6586xPmuSupply_LDO0
-#define V_1V2 TPS6586xPmuSupply_LDO1
-#define V_RTC TPS6586xPmuSupply_LDO2
-#define V_CAM_1V8 TPS6586xPmuSupply_LDO3
-#define V_CODEC_1V8 TPS6586xPmuSupply_LDO4
-#define V_CAM_2V8 TPS6586xPmuSupply_LDO5
-#define V_3V3 TPS6586xPmuSupply_LDO6
-#define V_SDIO TPS6586xPmuSupply_LDO7
-#define V_2V8 TPS6586xPmuSupply_LDO8
-#define V_2V5 TPS6586xPmuSupply_LDO9
-#define V_25V TPS6586xPmuSupply_WHITE_LED
-#define V_CHARGE TPS6586xPmuSupply_DCD2
-#define V_MODEM V_1V8 /* Alias for V_1V8 */
-#define V_GND TPS6586xPmuSupply_Invalid
-#define V_INVALID TPS6586xPmuSupply_Invalid
-#define VRAILCOUNT TPS6586xPmuSupply_Num
-#endif
+#define TPS_EXT_GUID(supply) \
+ (NV_ODM_GUID('t','p','s','e','x','t',0,0) | ((supply) & 0xff))
typedef enum
{
@@ -149,7 +116,7 @@ typedef enum
//White LED(SW3)
TPS6586xPmuSupply_WHITE_LED,
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
+
//SOC
TPS6586xPmuSupply_SoC,
@@ -180,12 +147,23 @@ typedef enum
// AP GPIO(C,6): VDD_PNL
// FIXME: This is already supplied by nvodm_query_gpio in the display GPIO settings.
Ext_SWITCHPmuSupply_VDD_PNL,
-#endif
TPS6586xPmuSupply_Num,
+
TPS6586xPmuSupply_Force32 = 0x7FFFFFFF
} TPS6586xPmuSupply;
+/// The total number of external supplies (which use both AP and PMU GPIOs)
+#define TPS6586x_EXTERNAL_SUPPLY_NUM \
+ (NvU32)(TPS6586xPmuSupply_Num - Ext_TPS62290PmuSupply_BUCK)
+
+/// Macro for converting a vddRail to AP GPIO pin index.
+#define NVODM_EXT_AP_GPIO_RAIL(x) ((x) - Ext_TPS2051BPmuSupply_VDDIO_VID)
+
+/// The total number of external supplies which use AP GPIO pins for enable
+#define TPS6586x_EXTERNAL_SUPPLY_AP_GPIO_NUM \
+ (NvU32)NVODM_EXT_AP_GPIO_RAIL(TPS6586xPmuSupply_Num)
+
#if defined(__cplusplus)
}
#endif
diff --git a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/tps6586x_reg.h b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/tps6586x_reg.h
index c22cc43854ae..e85fa23a8ca8 100644
--- a/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/tps6586x_reg.h
+++ b/arch/arm/mach-tegra/odm_kit/adaptations/pmu/tps6586x/tps6586x_reg.h
@@ -102,7 +102,6 @@ extern "C"
#define TPS6586x_R5D_GPIOSET1 0x5D
#define TPS6586x_R5E_GPIOSET2 0x5E
-#if defined(CONFIG_TEGRA_ODM_HARMONY)
/*-- GPIO Register Bit Shifts/Masks --*/
// GPIO1
#define TPS6586x_R5D_GPIOSET1_GPIO1_MODE_SHIFT 0x0
@@ -140,7 +139,6 @@ extern "C"
#define TPS6586x_R5D_GPIO_MODE_OUTPUT 0x1
#define TPS6586x_R5D_GPIO_MODE_INPUT_ADC 0x2
#define TPS6586x_R5D_GPIO_MODE_INPUT_LDO 0x3
-#endif
/* ADC0 Engine Setup */
#define TPS6586x_R60_ADCANLG 0x60
diff --git a/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_addresses.h b/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_addresses.h
index 53cb2bd50aba..ff173983e730 100644
--- a/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_addresses.h
+++ b/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_addresses.h
@@ -245,6 +245,26 @@ static const NvOdmIoAddress s_Pmu0Addresses[] =
{ NvOdmIoModule_I2c_Pmu, 0x00, 0x68 },
};
+static const NvOdmIoAddress s_Vddio_Vid_En[] = {
+ { NvOdmIoModule_Gpio, 't'-'a', 2 },
+};
+
+static const NvOdmIoAddress s_Vddio_Sd_En[] = {
+ { NvOdmIoModule_Gpio, 't'-'a', 3 },
+};
+
+static const NvOdmIoAddress s_Vddio_Sdmmc_En[] = {
+ { NvOdmIoModule_Gpio, 'i'-'a', 6 },
+};
+
+static const NvOdmIoAddress s_Vddio_Bl_En[] = {
+ { NvOdmIoModule_Gpio, 'w'-'a', 0 },
+};
+
+static const NvOdmIoAddress s_Vddio_Pnl_En[] = {
+ { NvOdmIoModule_Gpio, 'c'-'a', 6 },
+};
+
// SPI1 for Spi Ethernet Kitl only
static const NvOdmIoAddress s_SpiEthernetAddresses[] =
{
@@ -262,6 +282,8 @@ static const NvOdmIoAddress s_UlpiUsbAddresses[] =
static const NvOdmIoAddress s_LvdsDisplayAddresses[] =
{
{ NvOdmIoModule_Display, 0, 0 },
+ { NvOdmIoModule_I2c, 0x00, 0xA0 },
+ { NvOdmIoModule_Pwm, 0x00, 0 },
{ NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO4}, /* VDDIO_LCD (AON:VDD_1V8) */
{ NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO3 }, /* VDD_LVDS (VDD_3V3) */
};
@@ -278,12 +300,24 @@ static const NvOdmIoAddress s_HdmiAddresses[] =
// HDCP ROM
{ NvOdmIoModule_I2c, 0x01, 0x74 },
- /* AVDD_HDMI */
- { NvOdmIoModule_Vdd, 0x00, Ext_TPS2051BPmuSupply_VDDIO_VID }, // VDDIO_HDMI
- { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO8 }, // AVDD_HDMI_PLL
+ // AVDD_HDMI
+ { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO7 },
+ // AVDD_HDMI_PLL
+ { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO8 },
- /* lcd i/o rail (for hot plug pin) */
- { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO4 }, // VDDIO_LCD (VDD_1V8)
+ // Power for DDC (VDDIO_LCD (VDD_1V8))
+ { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO4 },
+ // HDMI +5V for the pull-up for DDC (VDDIO_VID)
+ { NvOdmIoModule_Vdd, 0x00, Ext_TPS2051BPmuSupply_VDDIO_VID },
+};
+
+// Power for HDMI Hotplug
+static const NvOdmIoAddress s_HdmiHotplug[] =
+{
+ // Power for Hotplug GPIO
+ { NvOdmIoModule_Vdd, 0x00, TPS6586xPmuSupply_LDO4 },
+ // HDMI +5V for hotplug
+ { NvOdmIoModule_Vdd, 0x00, Ext_TPS2051BPmuSupply_VDDIO_VID },
};
// CRT address based on Concorde 2 design
@@ -402,6 +436,7 @@ static const NvOdmIoAddress s_AudioCodecAddresses[] =
{ NvOdmIoModule_ExternalClock, 0, 0 }, /* Codec MCLK -> APxx DAP_MCLK1 */
{ NvOdmIoModule_I2c_Pmu, 0x00, 0x34 }, /* Codec I2C -> APxx PMU I2C, segment 0 */
/* Codec I2C address is 0x34 */
+ { NvOdmIoModule_Gpio, (NvU32)'w'-'a', 0x02 }, /* GPIO Port W and Pin 2 for HP_DET */
};
// Audio Codec on GEN1_I2C (I2C_1)
diff --git a/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_peripherals.h b/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_peripherals.h
index cbeda02525a8..ce5df47f3233 100644
--- a/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_peripherals.h
+++ b/arch/arm/mach-tegra/odm_kit/query/harmony/subboards/nvodm_query_discovery_e1162_peripherals.h
@@ -305,6 +305,14 @@
NvOdmPeripheralClass_Other
},
+// Power for HDMI Hotplug
+{
+ NV_VDD_HDMI_INT_ID,
+ s_HdmiHotplug,
+ NV_ARRAY_SIZE(s_HdmiHotplug),
+ NvOdmPeripheralClass_Other
+},
+
// PMU0
{
NV_ODM_GUID('t','p','s','6','5','8','6','x'),
@@ -312,6 +320,37 @@
NV_ARRAY_SIZE(s_Pmu0Addresses),
NvOdmPeripheralClass_Other
},
+// PMU voltage rails enabled by AP GPIOs
+{
+ TPS_EXT_GUID(Ext_TPS2051BPmuSupply_VDDIO_VID),
+ s_Vddio_Vid_En,
+ NV_ARRAY_SIZE(s_Vddio_Vid_En),
+ NvOdmPeripheralClass_Other,
+},
+{
+ TPS_EXT_GUID(Ext_SWITCHPmuSupply_VDDIO_SD),
+ s_Vddio_Sd_En,
+ NV_ARRAY_SIZE(s_Vddio_Sd_En),
+ NvOdmPeripheralClass_Other,
+},
+{
+ TPS_EXT_GUID(Ext_SWITCHPmuSupply_VDDIO_SDMMC),
+ s_Vddio_Sdmmc_En,
+ NV_ARRAY_SIZE(s_Vddio_Sdmmc_En),
+ NvOdmPeripheralClass_Other,
+},
+{
+ TPS_EXT_GUID(Ext_SWITCHPmuSupply_VDD_BL),
+ s_Vddio_Bl_En,
+ NV_ARRAY_SIZE(s_Vddio_Bl_En),
+ NvOdmPeripheralClass_Other,
+},
+{
+ TPS_EXT_GUID(Ext_SWITCHPmuSupply_VDD_PNL),
+ s_Vddio_Pnl_En,
+ NV_ARRAY_SIZE(s_Vddio_Pnl_En),
+ NvOdmPeripheralClass_Other,
+},
// ENC28J60 SPI Ethernet module
{