diff options
| author | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> | 2014-06-13 16:18:20 -0500 |
|---|---|---|
| committer | Richard Liu <r66033@freescale.com> | 2014-06-16 14:57:00 +0800 |
| commit | 0a3529b5d4a9070297dea78cf609b50a2710a9ec (patch) | |
| tree | dc2805374c447c03413d6c4027bea646f99f5ada | |
| parent | 91868625a717157dd74eae02ae6eb624d0277a80 (diff) | |
ENGR00318393 [iMX6x] Ensure certain CP15 registers are maintained across suspend/resumekk4.4.2_1.0.0-ga
Many A9 errata require bits in the diagnostic control register to be set.
During a suspend/resume cycle, the A9 core may get power gated, implying
that the register needs to be maintained across a suspend/resume cycle.
Also ensure that power control register is saved/restored.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/mx6_suspend.S | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/mx6_suspend.S b/arch/arm/mach-mx6/mx6_suspend.S index e8642f8e1e66..c7aa43a35179 100644 --- a/arch/arm/mach-mx6/mx6_suspend.S +++ b/arch/arm/mach-mx6/mx6_suspend.S @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2010-2014 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -1076,6 +1076,14 @@ ddr_io_save_done: mrs r7, cpsr @ Store CPSR stmfd r0!, {r4-r7} + /* Save diagnostic control register */ + mrc p15, 0, r4, c15, c0, 1 @ Diagnostic control reg + stmfd r0!, {r4} + + /* Save Power control register */ + mrc p15, 0, r4, c15, c0, 0 @ Diagnostic control reg + stmfd r0!, {r4} + /* c1 control register */ mrc p15, 0, r4, c1, c0, 0 @ SCTLR stmfd r0!, {r4} @@ -1544,6 +1552,14 @@ poll_dvfs_clear_2: mrc p15, 0, r6, c12, c0, 0 @ Secure or NS VBAR msr cpsr, r7 @ store cpsr + /* Restore diagnostic control register */ + ldmea r0!,{r4} + mcr p15, 0, r4, c15, c0, 1 @ Diagnostic control reg + + /* Restore Power control register */ + ldmea r0!,{r4} + mcr p15, 0, r4, c15, c0, 0 @ Diagnostic control reg + /* * Enabling MMU here. Page entry needs to be altered * to create temporary 1:1 map and then resore the entry |