diff options
author | Justin Waters <justin.waters@timesys.com> | 2008-05-29 11:49:55 -0400 |
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committer | Justin Waters <justin.waters@timesys.com> | 2008-05-29 11:49:55 -0400 |
commit | 1409e6a897e012b5473762be338afe3c7e6fab76 (patch) | |
tree | 599153d5fa1ad325eabe966419cbb0a8aa6b33b2 | |
parent | 3799da6683b7a169e9199a808eeb7006c5d76626 (diff) |
MX27 GPIO: Ensure 8-bit operation for the NAND flash
This patch sets up the NAND registers to use 8-bit NAND flash. This is from
the MX27ADS code, and was removed during the porting effort.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
-rw-r--r-- | arch/arm/mach-mx27/mx27lite_gpio.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-mx27/mx27lite_gpio.c b/arch/arm/mach-mx27/mx27lite_gpio.c index 2667729d437e..16a921f4de33 100644 --- a/arch/arm/mach-mx27/mx27lite_gpio.c +++ b/arch/arm/mach-mx27/mx27lite_gpio.c @@ -497,6 +497,13 @@ void gpio_spi_inactive(int cspi_mod) */ void gpio_nand_active(void) { + unsigned long reg; + + /* Ensure 8-Bit operation */ + reg = __raw_readl(SYS_FMCR); + reg &= ~(1 << 4); + __raw_writel(reg, SYS_FMCR); + gpio_request_mux(MX27_PIN_NFRB, GPIO_MUX_PRIMARY); gpio_request_mux(MX27_PIN_NFCE_B, GPIO_MUX_PRIMARY); gpio_request_mux(MX27_PIN_NFWP_B, GPIO_MUX_PRIMARY); |