diff options
| author | Juha Yrjola <juha.yrjola@solidboot.com> | 2006-09-25 12:41:49 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2006-09-25 12:41:49 +0300 |
| commit | dc0d794e488090082b7194738a08f18db0874900 (patch) | |
| tree | e3bd71aa1de6395843023eebbe4776b179d557c1 | |
| parent | dee45648a5e2f3075c51f5d6b5da65b32235d3f9 (diff) | |
ARM: OMAP2: Keep both APLLs active during bootup
Enabling and disabling the 54 MHz and 96 MHz APLLs can happen
unnecessarily often during bootup. Make sure they're kept
enabled during init.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 737aca4cff13..eee273bdd191 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -1117,6 +1117,12 @@ int __init omap2_clk_init(void) */ clk_enable(&sync_32k_ick); clk_enable(&omapctrl_ick); + + /* Force the APLLs active during bootup to avoid disabling and + * enabling them unnecessarily. */ + clk_enable(&apll96_ck); + clk_enable(&apll54_ck); + if (cpu_is_omap2430()) clk_enable(&sdrc_ick); @@ -1126,3 +1132,12 @@ int __init omap2_clk_init(void) return 0; } + +static int __init omap2_disable_aplls(void) +{ + clk_disable(&apll96_ck); + clk_disable(&apll54_ck); + + return 0; +} +late_initcall(omap2_disable_aplls); |