diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 12:34:00 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:47 +1000 |
| commit | 8700287be2b12d091d477fe0568c3858bdedf4e7 (patch) | |
| tree | 40a4b59a39a0f77f34b31d30db08b2fd51b9af37 | |
| parent | fd8666f7db94afc1b63b8439d902783b27a2f27f (diff) | |
drm/nouveau/sw: rename from software (no binary change)
Shorter device name, make consistent with our engine enums.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
32 files changed, 334 insertions, 334 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/device.h b/drivers/gpu/drm/nouveau/include/nvif/device.h index 7f1770beff21..90e2d9706f23 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/device.h +++ b/drivers/gpu/drm/nouveau/include/nvif/device.h @@ -53,7 +53,7 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **); #include <engine/device.h> #include <engine/fifo.h> #include <engine/gr.h> -#include <engine/software.h> +#include <engine/sw.h> #define nvkm_fifo(a) nouveau_fifo(nvkm_device(a)) #define nvkm_fifo_chan(a) ((struct nouveau_fifo_chan *)nvkm_object(a)) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h deleted file mode 100644 index 23a462b50d03..000000000000 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/software.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef __NOUVEAU_SOFTWARE_H__ -#define __NOUVEAU_SOFTWARE_H__ - -#include <core/engine.h> -#include <core/engctx.h> - -struct nouveau_software_chan { - struct nouveau_engctx base; - - int (*flip)(void *); - void *flip_data; -}; - -#define nouveau_software_context_create(p,e,c,d) \ - nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d)) -#define nouveau_software_context_destroy(d) \ - nouveau_engctx_destroy(&(d)->base) -#define nouveau_software_context_init(d) \ - nouveau_engctx_init(&(d)->base) -#define nouveau_software_context_fini(d,s) \ - nouveau_engctx_fini(&(d)->base, (s)) - -#define _nouveau_software_context_dtor _nouveau_engctx_dtor -#define _nouveau_software_context_init _nouveau_engctx_init -#define _nouveau_software_context_fini _nouveau_engctx_fini - -struct nouveau_software { - struct nouveau_engine base; -}; - -#define nouveau_software_create(p,e,c,d) \ - nouveau_engine_create((p), (e), (c), true, "SW", "software", (d)) -#define nouveau_software_destroy(d) \ - nouveau_engine_destroy(&(d)->base) -#define nouveau_software_init(d) \ - nouveau_engine_init(&(d)->base) -#define nouveau_software_fini(d,s) \ - nouveau_engine_fini(&(d)->base, (s)) - -#define _nouveau_software_dtor _nouveau_engine_dtor -#define _nouveau_software_init _nouveau_engine_init -#define _nouveau_software_fini _nouveau_engine_fini - -extern struct nouveau_oclass *nv04_software_oclass; -extern struct nouveau_oclass *nv10_software_oclass; -extern struct nouveau_oclass *nv50_software_oclass; -extern struct nouveau_oclass *nvc0_software_oclass; - -void nv04_software_intr(struct nouveau_subdev *); - -#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h new file mode 100644 index 000000000000..4c61a39222bb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h @@ -0,0 +1,51 @@ +#ifndef __NOUVEAU_SW_H__ +#define __NOUVEAU_SW_H__ + +#include <core/engine.h> +#include <core/engctx.h> + +struct nouveau_sw_chan { + struct nouveau_engctx base; + + int (*flip)(void *); + void *flip_data; +}; + +#define nouveau_sw_context_create(p,e,c,d) \ + nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d)) +#define nouveau_sw_context_destroy(d) \ + nouveau_engctx_destroy(&(d)->base) +#define nouveau_sw_context_init(d) \ + nouveau_engctx_init(&(d)->base) +#define nouveau_sw_context_fini(d,s) \ + nouveau_engctx_fini(&(d)->base, (s)) + +#define _nouveau_sw_context_dtor _nouveau_engctx_dtor +#define _nouveau_sw_context_init _nouveau_engctx_init +#define _nouveau_sw_context_fini _nouveau_engctx_fini + +struct nouveau_sw { + struct nouveau_engine base; +}; + +#define nouveau_sw_create(p,e,c,d) \ + nouveau_engine_create((p), (e), (c), true, "SW", "software", (d)) +#define nouveau_sw_destroy(d) \ + nouveau_engine_destroy(&(d)->base) +#define nouveau_sw_init(d) \ + nouveau_engine_init(&(d)->base) +#define nouveau_sw_fini(d,s) \ + nouveau_engine_fini(&(d)->base, (s)) + +#define _nouveau_sw_dtor _nouveau_engine_dtor +#define _nouveau_sw_init _nouveau_engine_init +#define _nouveau_sw_fini _nouveau_engine_fini + +extern struct nouveau_oclass *nv04_sw_oclass; +extern struct nouveau_oclass *nv10_sw_oclass; +extern struct nouveau_oclass *nv50_sw_oclass; +extern struct nouveau_oclass *nvc0_sw_oclass; + +void nv04_sw_intr(struct nouveau_subdev *); + +#endif diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index 80302530ead7..58b8b6423026 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -282,7 +282,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) struct nvif_device *device = chan->device; struct nouveau_cli *cli = (void *)nvif_client(&device->base); struct nouveau_mmu *mmu = nvkm_mmu(device); - struct nouveau_software_chan *swch; + struct nouveau_sw_chan *swch; struct nv_dma_v0 args = {}; int ret, i; diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 1118efa56817..e684040ccf11 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -231,7 +231,7 @@ nouveau_accel_init(struct nouveau_drm *drm) ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); if (ret == 0) { - struct nouveau_software_chan *swch; + struct nouveau_sw_chan *swch; ret = RING_SPACE(drm->channel, 2); if (ret == 0) { if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h index 43a96b99e180..7226f1f60901 100644 --- a/drivers/gpu/drm/nouveau/nouveau_reg.h +++ b/drivers/gpu/drm/nouveau/nouveau_reg.h @@ -72,7 +72,7 @@ # define NV_RAMHT_CONTEXT_VALID (1<<31) # define NV_RAMHT_CONTEXT_CHANNEL_SHIFT 24 # define NV_RAMHT_CONTEXT_ENGINE_SHIFT 16 -# define NV_RAMHT_CONTEXT_ENGINE_SOFTWARE 0 +# define NV_RAMHT_CONTEXT_ENGINE_SW 0 # define NV_RAMHT_CONTEXT_ENGINE_GRAPHICS 1 # define NV_RAMHT_CONTEXT_INSTANCE_SHIFT 0 # define NV40_RAMHT_CONTEXT_CHANNEL_SHIFT 23 diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild index 0607d595f6e7..bc51b0581ba5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild @@ -14,5 +14,5 @@ include $(src)/nvkm/engine/msvld/Kbuild include $(src)/nvkm/engine/pm/Kbuild include $(src)/nvkm/engine/msppp/Kbuild include $(src)/nvkm/engine/sec/Kbuild -include $(src)/nvkm/engine/software/Kbuild +include $(src)/nvkm/engine/sw/Kbuild include $(src)/nvkm/engine/vp/Kbuild diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index 690250503332..55e463396c8c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -45,7 +45,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/disp.h> #include <engine/ce.h> @@ -85,7 +85,7 @@ gm100_identify(struct nouveau_device *device) #endif device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -129,7 +129,7 @@ gm100_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; #if 0 device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; #endif device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c index dcb53917b5e0..1d409af560da 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c @@ -36,7 +36,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/disp.h> @@ -58,7 +58,7 @@ nv04_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv04_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv04_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv04_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv04_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -76,7 +76,7 @@ nv04_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv04_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv04_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv04_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv04_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c index f292e7b88628..66d8c338ae98 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c @@ -37,7 +37,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/disp.h> @@ -77,7 +77,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -96,7 +96,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -115,7 +115,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -134,7 +134,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -153,7 +153,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -172,7 +172,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -191,7 +191,7 @@ nv10_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c index a03420ca82b1..59cefdd46897 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c @@ -38,7 +38,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/disp.h> @@ -61,7 +61,7 @@ nv20_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv20_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -80,7 +80,7 @@ nv20_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv25_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -99,7 +99,7 @@ nv20_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv25_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -118,7 +118,7 @@ nv20_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv2a_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c index 59b6baa64b4c..dfb610f837b0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c @@ -37,7 +37,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/mpeg.h> #include <engine/disp.h> @@ -61,7 +61,7 @@ nv30_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv30_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -80,7 +80,7 @@ nv30_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv35_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; break; @@ -99,7 +99,7 @@ nv30_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv30_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -119,7 +119,7 @@ nv30_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv35_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -139,7 +139,7 @@ nv30_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv34_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c index cd859b081db4..7bdb7d6729b7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c @@ -40,7 +40,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/mpeg.h> #include <engine/disp.h> @@ -67,7 +67,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -90,7 +90,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -113,7 +113,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -136,7 +136,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -159,7 +159,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -182,7 +182,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -205,7 +205,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -228,7 +228,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -251,7 +251,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -274,7 +274,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -297,7 +297,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -320,7 +320,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -343,7 +343,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -366,7 +366,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -389,7 +389,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; @@ -412,7 +412,7 @@ nv40_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv40_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv10_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 3f3d2ea1a930..13203f53c80d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -43,7 +43,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/mpeg.h> #include <engine/vp.h> @@ -80,7 +80,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv50_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv50_disp_oclass; @@ -106,7 +106,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -135,7 +135,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -164,7 +164,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -193,7 +193,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -222,7 +222,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -251,7 +251,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; @@ -280,7 +280,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; @@ -309,7 +309,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; @@ -338,7 +338,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; @@ -368,7 +368,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; @@ -399,7 +399,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; @@ -429,7 +429,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; @@ -459,7 +459,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv84_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nv50_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv98_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c index b241421e76a2..ae856f8bcc75 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c @@ -45,7 +45,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/vp.h> #include <engine/bsp.h> @@ -82,7 +82,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc0_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -115,7 +115,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -148,7 +148,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -180,7 +180,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -213,7 +213,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -245,7 +245,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc1_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -277,7 +277,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc8_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -310,7 +310,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvd9_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; @@ -340,7 +340,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvd7_gr_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c index df975987b9ca..13934f2b9cbd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c @@ -45,7 +45,7 @@ #include <engine/device.h> #include <engine/dmaobj.h> #include <engine/fifo.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/gr.h> #include <engine/disp.h> #include <engine/ce.h> @@ -82,7 +82,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -116,7 +116,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -150,7 +150,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nve4_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -176,7 +176,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &nve0_ce2_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass; @@ -206,7 +206,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvf0_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -240,7 +240,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk110b_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -274,7 +274,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nv108_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; @@ -307,7 +307,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass; - device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; + device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = nv108_gr_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nve0_ce0_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c index e2ad0543fb31..26aaa2a201e5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c index 672ded79b2a9..40b44f990990 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv84.c index 13eff5e4ee51..547926678710 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv84.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv94.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv94.c index 2bb7ac5cd0e6..c009be4fb11c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv94.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv94.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva0.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva0.c index b32456c9494f..317fd1a22076 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva0.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva3.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva3.c index 951d79f9b781..af9441338239 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva3.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nva3.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nve0.c index 55debec7e68f..063cb4ad304c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nve0.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nvf0.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nvf0.c index 3e7e2d28744c..3fd9b462d51f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nvf0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nvf0.c @@ -22,7 +22,7 @@ * Authors: Ben Skeggs */ -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include <nvif/class.h> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild deleted file mode 100644 index e1332a15dc1b..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/Kbuild +++ /dev/null @@ -1,4 +0,0 @@ -nvkm-y += nvkm/engine/software/nv04.o -nvkm-y += nvkm/engine/software/nv10.o -nvkm-y += nvkm/engine/software/nv50.o -nvkm-y += nvkm/engine/software/nvc0.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h deleted file mode 100644 index 41542e725b4b..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.h +++ /dev/null @@ -1,46 +0,0 @@ -#ifndef __NVKM_SW_NV50_H__ -#define __NVKM_SW_NV50_H__ - -#include <engine/software.h> - -struct nv50_software_oclass { - struct nouveau_oclass base; - struct nouveau_oclass *cclass; - struct nouveau_oclass *sclass; -}; - -struct nv50_software_priv { - struct nouveau_software base; -}; - -int nv50_software_ctor(struct nouveau_object *, struct nouveau_object *, - struct nouveau_oclass *, void *, u32, - struct nouveau_object **); - -struct nv50_software_cclass { - struct nouveau_oclass base; - int (*vblank)(struct nvkm_notify *); -}; - -struct nv50_software_chan { - struct nouveau_software_chan base; - struct { - struct nvkm_notify notify[4]; - u32 channel; - u32 ctxdma; - u64 offset; - u32 value; - } vblank; -}; - -int nv50_software_context_ctor(struct nouveau_object *, - struct nouveau_object *, - struct nouveau_oclass *, void *, u32, - struct nouveau_object **); -void nv50_software_context_dtor(struct nouveau_object *); - -int nv50_software_mthd_vblsem_value(struct nouveau_object *, u32, void *, u32); -int nv50_software_mthd_vblsem_release(struct nouveau_object *, u32, void *, u32); -int nv50_software_mthd_flip(struct nouveau_object *, u32, void *, u32); - -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild new file mode 100644 index 000000000000..b8d215900fce --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/Kbuild @@ -0,0 +1,4 @@ +nvkm-y += nvkm/engine/sw/nv04.o +nvkm-y += nvkm/engine/sw/nv10.o +nvkm-y += nvkm/engine/sw/nv50.o +nvkm-y += nvkm/engine/sw/nvc0.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c index 64df15c7f051..3d0e4bc76389 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c @@ -25,15 +25,15 @@ #include <core/os.h> #include <core/engctx.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/fifo.h> -struct nv04_software_priv { - struct nouveau_software base; +struct nv04_sw_priv { + struct nouveau_sw base; }; -struct nv04_software_chan { - struct nouveau_software_chan base; +struct nv04_sw_chan { + struct nouveau_sw_chan base; }; /******************************************************************************* @@ -41,7 +41,7 @@ struct nv04_software_chan { ******************************************************************************/ static int -nv04_software_set_ref(struct nouveau_object *object, u32 mthd, +nv04_sw_set_ref(struct nouveau_object *object, u32 mthd, void *data, u32 size) { struct nouveau_object *channel = (void *)nv_engctx(object->parent); @@ -51,25 +51,25 @@ nv04_software_set_ref(struct nouveau_object *object, u32 mthd, } static int -nv04_software_flip(struct nouveau_object *object, u32 mthd, +nv04_sw_flip(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv04_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv04_sw_chan *chan = (void *)nv_engctx(object->parent); if (chan->base.flip) return chan->base.flip(chan->base.flip_data); return -EINVAL; } static struct nouveau_omthds -nv04_software_omthds[] = { - { 0x0150, 0x0150, nv04_software_set_ref }, - { 0x0500, 0x0500, nv04_software_flip }, +nv04_sw_omthds[] = { + { 0x0150, 0x0150, nv04_sw_set_ref }, + { 0x0500, 0x0500, nv04_sw_flip }, {} }; static struct nouveau_oclass -nv04_software_sclass[] = { - { 0x006e, &nouveau_object_ofuncs, nv04_software_omthds }, +nv04_sw_sclass[] = { + { 0x006e, &nouveau_object_ofuncs, nv04_sw_omthds }, {} }; @@ -78,15 +78,15 @@ nv04_software_sclass[] = { ******************************************************************************/ static int -nv04_software_context_ctor(struct nouveau_object *parent, +nv04_sw_context_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { - struct nv04_software_chan *chan; + struct nv04_sw_chan *chan; int ret; - ret = nouveau_software_context_create(parent, engine, oclass, &chan); + ret = nouveau_sw_context_create(parent, engine, oclass, &chan); *pobject = nv_object(chan); if (ret) return ret; @@ -95,13 +95,13 @@ nv04_software_context_ctor(struct nouveau_object *parent, } static struct nouveau_oclass -nv04_software_cclass = { +nv04_sw_cclass = { .handle = NV_ENGCTX(SW, 0x04), .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv04_software_context_ctor, - .dtor = _nouveau_software_context_dtor, - .init = _nouveau_software_context_init, - .fini = _nouveau_software_context_fini, + .ctor = nv04_sw_context_ctor, + .dtor = _nouveau_sw_context_dtor, + .init = _nouveau_sw_context_init, + .fini = _nouveau_sw_context_fini, }, }; @@ -110,37 +110,37 @@ nv04_software_cclass = { ******************************************************************************/ void -nv04_software_intr(struct nouveau_subdev *subdev) +nv04_sw_intr(struct nouveau_subdev *subdev) { nv_mask(subdev, 0x000100, 0x80000000, 0x00000000); } static int -nv04_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine, +nv04_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { - struct nv04_software_priv *priv; + struct nv04_sw_priv *priv; int ret; - ret = nouveau_software_create(parent, engine, oclass, &priv); + ret = nouveau_sw_create(parent, engine, oclass, &priv); *pobject = nv_object(priv); if (ret) return ret; - nv_engine(priv)->cclass = &nv04_software_cclass; - nv_engine(priv)->sclass = nv04_software_sclass; - nv_subdev(priv)->intr = nv04_software_intr; + nv_engine(priv)->cclass = &nv04_sw_cclass; + nv_engine(priv)->sclass = nv04_sw_sclass; + nv_subdev(priv)->intr = nv04_sw_intr; return 0; } struct nouveau_oclass * -nv04_software_oclass = &(struct nouveau_oclass) { +nv04_sw_oclass = &(struct nouveau_oclass) { .handle = NV_ENGINE(SW, 0x04), .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv04_software_ctor, - .dtor = _nouveau_software_dtor, - .init = _nouveau_software_init, - .fini = _nouveau_software_fini, + .ctor = nv04_sw_ctor, + .dtor = _nouveau_sw_dtor, + .init = _nouveau_sw_init, + .fini = _nouveau_sw_fini, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c index f54a2253deca..12775cdbde70 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c @@ -25,14 +25,14 @@ #include <core/os.h> #include <core/engctx.h> -#include <engine/software.h> +#include <engine/sw.h> -struct nv10_software_priv { - struct nouveau_software base; +struct nv10_sw_priv { + struct nouveau_sw base; }; -struct nv10_software_chan { - struct nouveau_software_chan base; +struct nv10_sw_chan { + struct nouveau_sw_chan base; }; /******************************************************************************* @@ -40,24 +40,24 @@ struct nv10_software_chan { ******************************************************************************/ static int -nv10_software_flip(struct nouveau_object *object, u32 mthd, +nv10_sw_flip(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv10_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv10_sw_chan *chan = (void *)nv_engctx(object->parent); if (chan->base.flip) return chan->base.flip(chan->base.flip_data); return -EINVAL; } static struct nouveau_omthds -nv10_software_omthds[] = { - { 0x0500, 0x0500, nv10_software_flip }, +nv10_sw_omthds[] = { + { 0x0500, 0x0500, nv10_sw_flip }, {} }; static struct nouveau_oclass -nv10_software_sclass[] = { - { 0x016e, &nouveau_object_ofuncs, nv10_software_omthds }, +nv10_sw_sclass[] = { + { 0x016e, &nouveau_object_ofuncs, nv10_sw_omthds }, {} }; @@ -66,15 +66,15 @@ nv10_software_sclass[] = { ******************************************************************************/ static int -nv10_software_context_ctor(struct nouveau_object *parent, +nv10_sw_context_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { - struct nv10_software_chan *chan; + struct nv10_sw_chan *chan; int ret; - ret = nouveau_software_context_create(parent, engine, oclass, &chan); + ret = nouveau_sw_context_create(parent, engine, oclass, &chan); *pobject = nv_object(chan); if (ret) return ret; @@ -83,13 +83,13 @@ nv10_software_context_ctor(struct nouveau_object *parent, } static struct nouveau_oclass -nv10_software_cclass = { +nv10_sw_cclass = { .handle = NV_ENGCTX(SW, 0x04), .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv10_software_context_ctor, - .dtor = _nouveau_software_context_dtor, - .init = _nouveau_software_context_init, - .fini = _nouveau_software_context_fini, + .ctor = nv10_sw_context_ctor, + .dtor = _nouveau_sw_context_dtor, + .init = _nouveau_sw_context_init, + .fini = _nouveau_sw_context_fini, }, }; @@ -98,31 +98,31 @@ nv10_software_cclass = { ******************************************************************************/ static int -nv10_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine, +nv10_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { - struct nv10_software_priv *priv; + struct nv10_sw_priv *priv; int ret; - ret = nouveau_software_create(parent, engine, oclass, &priv); + ret = nouveau_sw_create(parent, engine, oclass, &priv); *pobject = nv_object(priv); if (ret) return ret; - nv_engine(priv)->cclass = &nv10_software_cclass; - nv_engine(priv)->sclass = nv10_software_sclass; - nv_subdev(priv)->intr = nv04_software_intr; + nv_engine(priv)->cclass = &nv10_sw_cclass; + nv_engine(priv)->sclass = nv10_sw_sclass; + nv_subdev(priv)->intr = nv04_sw_intr; return 0; } struct nouveau_oclass * -nv10_software_oclass = &(struct nouveau_oclass) { +nv10_sw_oclass = &(struct nouveau_oclass) { .handle = NV_ENGINE(SW, 0x10), .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv10_software_ctor, - .dtor = _nouveau_software_dtor, - .init = _nouveau_software_init, - .fini = _nouveau_software_fini, + .ctor = nv10_sw_ctor, + .dtor = _nouveau_sw_dtor, + .init = _nouveau_sw_init, + .fini = _nouveau_sw_fini, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c index a0fec205f9db..a214a4debcc4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c @@ -41,10 +41,10 @@ ******************************************************************************/ static int -nv50_software_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd, +nv50_sw_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); struct nouveau_fifo_chan *fifo = (void *)nv_object(chan)->parent; struct nouveau_handle *handle; int ret = -EINVAL; @@ -63,28 +63,28 @@ nv50_software_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd, } static int -nv50_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd, +nv50_sw_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); chan->vblank.offset = *(u32 *)args; return 0; } int -nv50_software_mthd_vblsem_value(struct nouveau_object *object, u32 mthd, +nv50_sw_mthd_vblsem_value(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); chan->vblank.value = *(u32 *)args; return 0; } int -nv50_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd, +nv50_sw_mthd_vblsem_release(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); u32 head = *(u32 *)args; if (head >= nouveau_disp(chan)->vblank.index_nr) return -EINVAL; @@ -94,28 +94,28 @@ nv50_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd, } int -nv50_software_mthd_flip(struct nouveau_object *object, u32 mthd, +nv50_sw_mthd_flip(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); if (chan->base.flip) return chan->base.flip(chan->base.flip_data); return -EINVAL; } static struct nouveau_omthds -nv50_software_omthds[] = { - { 0x018c, 0x018c, nv50_software_mthd_dma_vblsem }, - { 0x0400, 0x0400, nv50_software_mthd_vblsem_offset }, - { 0x0404, 0x0404, nv50_software_mthd_vblsem_value }, - { 0x0408, 0x0408, nv50_software_mthd_vblsem_release }, - { 0x0500, 0x0500, nv50_software_mthd_flip }, +nv50_sw_omthds[] = { + { 0x018c, 0x018c, nv50_sw_mthd_dma_vblsem }, + { 0x0400, 0x0400, nv50_sw_mthd_vblsem_offset }, + { 0x0404, 0x0404, nv50_sw_mthd_vblsem_value }, + { 0x0408, 0x0408, nv50_sw_mthd_vblsem_release }, + { 0x0500, 0x0500, nv50_sw_mthd_flip }, {} }; static struct nouveau_oclass -nv50_software_sclass[] = { - { 0x506e, &nouveau_object_ofuncs, nv50_software_omthds }, +nv50_sw_sclass[] = { + { 0x506e, &nouveau_object_ofuncs, nv50_sw_omthds }, {} }; @@ -124,11 +124,11 @@ nv50_software_sclass[] = { ******************************************************************************/ static int -nv50_software_vblsem_release(struct nvkm_notify *notify) +nv50_sw_vblsem_release(struct nvkm_notify *notify) { - struct nv50_software_chan *chan = + struct nv50_sw_chan *chan = container_of(notify, typeof(*chan), vblank.notify[notify->index]); - struct nv50_software_priv *priv = (void *)nv_object(chan)->engine; + struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine; struct nouveau_bar *bar = nouveau_bar(priv); nv_wr32(priv, 0x001704, chan->vblank.channel); @@ -147,29 +147,29 @@ nv50_software_vblsem_release(struct nvkm_notify *notify) } void -nv50_software_context_dtor(struct nouveau_object *object) +nv50_sw_context_dtor(struct nouveau_object *object) { - struct nv50_software_chan *chan = (void *)object; + struct nv50_sw_chan *chan = (void *)object; int i; for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++) nvkm_notify_fini(&chan->vblank.notify[i]); - nouveau_software_context_destroy(&chan->base); + nouveau_sw_context_destroy(&chan->base); } int -nv50_software_context_ctor(struct nouveau_object *parent, +nv50_sw_context_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { struct nouveau_disp *pdisp = nouveau_disp(parent); - struct nv50_software_cclass *pclass = (void *)oclass; - struct nv50_software_chan *chan; + struct nv50_sw_cclass *pclass = (void *)oclass; + struct nv50_sw_chan *chan; int ret, i; - ret = nouveau_software_context_create(parent, engine, oclass, &chan); + ret = nouveau_sw_context_create(parent, engine, oclass, &chan); *pobject = nv_object(chan); if (ret) return ret; @@ -191,16 +191,16 @@ nv50_software_context_ctor(struct nouveau_object *parent, return 0; } -static struct nv50_software_cclass -nv50_software_cclass = { +static struct nv50_sw_cclass +nv50_sw_cclass = { .base.handle = NV_ENGCTX(SW, 0x50), .base.ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv50_software_context_ctor, - .dtor = nv50_software_context_dtor, - .init = _nouveau_software_context_init, - .fini = _nouveau_software_context_fini, + .ctor = nv50_sw_context_ctor, + .dtor = nv50_sw_context_dtor, + .init = _nouveau_sw_context_init, + .fini = _nouveau_sw_context_fini, }, - .vblank = nv50_software_vblsem_release, + .vblank = nv50_sw_vblsem_release, }; /******************************************************************************* @@ -208,34 +208,34 @@ nv50_software_cclass = { ******************************************************************************/ int -nv50_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine, +nv50_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { - struct nv50_software_oclass *pclass = (void *)oclass; - struct nv50_software_priv *priv; + struct nv50_sw_oclass *pclass = (void *)oclass; + struct nv50_sw_priv *priv; int ret; - ret = nouveau_software_create(parent, engine, oclass, &priv); + ret = nouveau_sw_create(parent, engine, oclass, &priv); *pobject = nv_object(priv); if (ret) return ret; nv_engine(priv)->cclass = pclass->cclass; nv_engine(priv)->sclass = pclass->sclass; - nv_subdev(priv)->intr = nv04_software_intr; + nv_subdev(priv)->intr = nv04_sw_intr; return 0; } struct nouveau_oclass * -nv50_software_oclass = &(struct nv50_software_oclass) { +nv50_sw_oclass = &(struct nv50_sw_oclass) { .base.handle = NV_ENGINE(SW, 0x50), .base.ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv50_software_ctor, - .dtor = _nouveau_software_dtor, - .init = _nouveau_software_init, - .fini = _nouveau_software_fini, + .ctor = nv50_sw_ctor, + .dtor = _nouveau_sw_dtor, + .init = _nouveau_sw_init, + .fini = _nouveau_sw_fini, }, - .cclass = &nv50_software_cclass.base, - .sclass = nv50_software_sclass, + .cclass = &nv50_sw_cclass.base, + .sclass = nv50_sw_sclass, }.base; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h new file mode 100644 index 000000000000..618e41fa36d0 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.h @@ -0,0 +1,46 @@ +#ifndef __NVKM_SW_NV50_H__ +#define __NVKM_SW_NV50_H__ + +#include <engine/sw.h> + +struct nv50_sw_oclass { + struct nouveau_oclass base; + struct nouveau_oclass *cclass; + struct nouveau_oclass *sclass; +}; + +struct nv50_sw_priv { + struct nouveau_sw base; +}; + +int nv50_sw_ctor(struct nouveau_object *, struct nouveau_object *, + struct nouveau_oclass *, void *, u32, + struct nouveau_object **); + +struct nv50_sw_cclass { + struct nouveau_oclass base; + int (*vblank)(struct nvkm_notify *); +}; + +struct nv50_sw_chan { + struct nouveau_sw_chan base; + struct { + struct nvkm_notify notify[4]; + u32 channel; + u32 ctxdma; + u64 offset; + u32 value; + } vblank; +}; + +int nv50_sw_context_ctor(struct nouveau_object *, + struct nouveau_object *, + struct nouveau_oclass *, void *, u32, + struct nouveau_object **); +void nv50_sw_context_dtor(struct nouveau_object *); + +int nv50_sw_mthd_vblsem_value(struct nouveau_object *, u32, void *, u32); +int nv50_sw_mthd_vblsem_release(struct nouveau_object *, u32, void *, u32); +int nv50_sw_mthd_flip(struct nouveau_object *, u32, void *, u32); + +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/software/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvc0.c index 6af370d3a06d..dcb056eae471 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/software/nvc0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvc0.c @@ -28,7 +28,7 @@ #include <subdev/bar.h> -#include <engine/software.h> +#include <engine/sw.h> #include <engine/disp.h> #include "nv50.h" @@ -38,10 +38,10 @@ ******************************************************************************/ static int -nvc0_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd, +nvc0_sw_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); u64 data = *(u32 *)args; if (mthd == 0x0400) { chan->vblank.offset &= 0x00ffffffffULL; @@ -54,11 +54,11 @@ nvc0_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd, } static int -nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd, +nvc0_sw_mthd_mp_control(struct nouveau_object *object, u32 mthd, void *args, u32 size) { - struct nv50_software_chan *chan = (void *)nv_engctx(object->parent); - struct nv50_software_priv *priv = (void *)nv_object(chan)->engine; + struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent); + struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine; u32 data = *(u32 *)args; switch (mthd) { @@ -80,21 +80,21 @@ nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd, } static struct nouveau_omthds -nvc0_software_omthds[] = { - { 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset }, - { 0x0404, 0x0404, nvc0_software_mthd_vblsem_offset }, - { 0x0408, 0x0408, nv50_software_mthd_vblsem_value }, - { 0x040c, 0x040c, nv50_software_mthd_vblsem_release }, - { 0x0500, 0x0500, nv50_software_mthd_flip }, - { 0x0600, 0x0600, nvc0_software_mthd_mp_control }, - { 0x0644, 0x0644, nvc0_software_mthd_mp_control }, - { 0x06ac, 0x06ac, nvc0_software_mthd_mp_control }, +nvc0_sw_omthds[] = { + { 0x0400, 0x0400, nvc0_sw_mthd_vblsem_offset }, + { 0x0404, 0x0404, nvc0_sw_mthd_vblsem_offset }, + { 0x0408, 0x0408, nv50_sw_mthd_vblsem_value }, + { 0x040c, 0x040c, nv50_sw_mthd_vblsem_release }, + { 0x0500, 0x0500, nv50_sw_mthd_flip }, + { 0x0600, 0x0600, nvc0_sw_mthd_mp_control }, + { 0x0644, 0x0644, nvc0_sw_mthd_mp_control }, + { 0x06ac, 0x06ac, nvc0_sw_mthd_mp_control }, {} }; static struct nouveau_oclass -nvc0_software_sclass[] = { - { 0x906e, &nouveau_object_ofuncs, nvc0_software_omthds }, +nvc0_sw_sclass[] = { + { 0x906e, &nouveau_object_ofuncs, nvc0_sw_omthds }, {} }; @@ -103,11 +103,11 @@ nvc0_software_sclass[] = { ******************************************************************************/ static int -nvc0_software_vblsem_release(struct nvkm_notify *notify) +nvc0_sw_vblsem_release(struct nvkm_notify *notify) { - struct nv50_software_chan *chan = + struct nv50_sw_chan *chan = container_of(notify, typeof(*chan), vblank.notify[notify->index]); - struct nv50_software_priv *priv = (void *)nv_object(chan)->engine; + struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine; struct nouveau_bar *bar = nouveau_bar(priv); nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel); @@ -119,16 +119,16 @@ nvc0_software_vblsem_release(struct nvkm_notify *notify) return NVKM_NOTIFY_DROP; } -static struct nv50_software_cclass -nvc0_software_cclass = { +static struct nv50_sw_cclass +nvc0_sw_cclass = { .base.handle = NV_ENGCTX(SW, 0xc0), .base.ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv50_software_context_ctor, - .dtor = nv50_software_context_dtor, - .init = _nouveau_software_context_init, - .fini = _nouveau_software_context_fini, + .ctor = nv50_sw_context_ctor, + .dtor = nv50_sw_context_dtor, + .init = _nouveau_sw_context_init, + .fini = _nouveau_sw_context_fini, }, - .vblank = nvc0_software_vblsem_release, + .vblank = nvc0_sw_vblsem_release, }; /******************************************************************************* @@ -136,14 +136,14 @@ nvc0_software_cclass = { ******************************************************************************/ struct nouveau_oclass * -nvc0_software_oclass = &(struct nv50_software_oclass) { +nvc0_sw_oclass = &(struct nv50_sw_oclass) { .base.handle = NV_ENGINE(SW, 0xc0), .base.ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv50_software_ctor, - .dtor = _nouveau_software_dtor, - .init = _nouveau_software_init, - .fini = _nouveau_software_fini, + .ctor = nv50_sw_ctor, + .dtor = _nouveau_sw_dtor, + .init = _nouveau_sw_init, + .fini = _nouveau_sw_fini, }, - .cclass = &nvc0_software_cclass.base, - .sclass = nvc0_software_sclass, + .cclass = &nvc0_sw_cclass.base, + .sclass = nvc0_sw_sclass, }.base; |