diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-11-24 20:12:06 -0800 |
|---|---|---|
| committer | Niket Sirsi <nsirsi@nvidia.com> | 2010-11-30 17:44:18 -0800 |
| commit | a735cfb19d8e974fe4111b0686e78ebbb1bf43ca (patch) | |
| tree | 2564fd2439d5e5c02ea99475a07fb0a64f684583 | |
| parent | 9b428890b27323d34a137ffa70a34a14a60fe7d7 (diff) | |
[ARM/tegra] RM: Disabled 3D power gating in LP1.
Bug 753226
Change-Id: I34e9e392580b38d4ebf805ce984a800097adf09a
Reviewed-on: http://git-master/r/11527
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c index 251cb1db9fbd..4e8fb6b1d0a7 100644 --- a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c +++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_power.c @@ -112,7 +112,6 @@ static NvBool IsSuspendPowerGateForced(NvU32 PowerGroup) // now check s/w support switch (PowerGroup) { - case NV_POWERGROUP_TD: case NV_POWERGROUP_PCIE: case NV_POWERGROUP_VDE: case NV_POWERGROUP_VE: |