diff options
| author | Maxim Levitsky <maximlevitsky@gmail.com> | 2010-02-22 20:39:40 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-02-26 18:44:57 +0000 |
| commit | 93edbad69b0491d794c2ec86bcc65c69eac676e3 (patch) | |
| tree | e3bd7b55c549f0373bfc9e3f1082458b9cd10fa2 | |
| parent | 5e81e88a4c140586d9212999cea683bcd66a15c6 (diff) | |
mtd: Workaround wrong write protect status on some xD cards
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 8 | ||||
| -rw-r--r-- | include/linux/mtd/nand.h | 6 |
2 files changed, 13 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 1c4823696be2..b9dc65c7253c 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -434,6 +434,11 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) static int nand_check_wp(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; + + /* broken xD cards report WP despite being writable */ + if (chip->options & NAND_BROKEN_XD) + return 0; + /* Check the WP bit */ chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; @@ -3175,7 +3180,8 @@ int nand_scan_tail(struct mtd_info *mtd) /* Fill in remaining MTD driver data */ mtd->type = MTD_NANDFLASH; - mtd->flags = MTD_CAP_NANDFLASH; + mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : + MTD_CAP_NANDFLASH; mtd->erase = nand_erase; mtd->point = NULL; mtd->unpoint = NULL; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index d152bdf9161f..8bdacb885f90 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -182,6 +182,12 @@ typedef enum { /* Chip does not allow subpage writes */ #define NAND_NO_SUBPAGE_WRITE 0x00000200 +/* Device is one of 'new' xD cards that expose fake nand command set */ +#define NAND_BROKEN_XD 0x00000400 + +/* Device behaves just like nand, but is readonly */ +#define NAND_ROM 0x00000800 + /* Options valid for Samsung large page devices */ #define NAND_SAMSUNG_LP_OPTIONS \ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) |