diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2014-01-15 18:29:36 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2014-01-22 18:56:33 +0100 |
| commit | 24b367fa9cf448c8b23dc7d0f2bc2a28801ed233 (patch) | |
| tree | 5abfb85864657e5b0c3b05076d7aad0900d309e8 | |
| parent | 441aca9bb7c1b011b92a7fb302f268f3969fda96 (diff) | |
mvf_dcu: calculate clock ratio from pixclock
In order to support different video modes the driver needs to calculate
the DCU div ratio from the pixelclock.
Taken from mainline framebuffer proposal by Alison Wang.
| -rw-r--r-- | drivers/video/mvf_dcu.c | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/video/mvf_dcu.c b/drivers/video/mvf_dcu.c index 4d42c8718925..165b39a1e2dc 100644 --- a/drivers/video/mvf_dcu.c +++ b/drivers/video/mvf_dcu.c @@ -488,11 +488,36 @@ static void set_fix(struct fb_info *info) fix->ypanstep = 1; } +static int calc_div_ratio(struct fb_info *info) +{ + struct mfb_info *mfbi = info->par; + struct mvf_dcu_fb_data *dcufb = mfbi->parent; + unsigned long dcu_clk; + unsigned long long tmp; + + /* + * Calculation could be done more precisly when we take parent clock + * into account too. We can change between 452MHz and 480MHz (see + * arch/arm/mach-mvf/clock.c + */ + dcu_clk = clk_get_rate(dcufb->clk); + tmp = info->var.pixclock * (unsigned long long)dcu_clk; + + do_div(tmp, 1000000); + + if (do_div(tmp, 1000000) > 500000) + tmp++; + + tmp = tmp - 1; + return tmp; +} + static void update_lcdc(struct fb_info *info) { struct fb_var_screeninfo *var = &info->var; struct mfb_info *mfbi = info->par; struct mvf_dcu_fb_data *dcu = mfbi->parent; + unsigned int ratio; if (mfbi->type == DCU_TYPE_OFF) { mvf_dcu_disable_panel(info); @@ -530,20 +555,8 @@ static void update_lcdc(struct fb_info *info) writel(DCU_MODE_BLEND_ITER(3) | DCU_MODE_RASTER_EN(1), dcu->base + DCU_DCU_MODE); -#if defined(CONFIG_COLIBRI_VF) -//1024x768: 452/7 = 64.6 MHz -// writel(6, dcu->base + DCU_DIV_RATIO); -//1024x600: 480/10 = 48 MHz -// writel(9, dcu->base + DCU_DIV_RATIO); -//800x600: 480/12 = 40 MHz -// writel(11, dcu->base + DCU_DIV_RATIO); -//800x480: 480/15 = 32 MHz -// writel(14, dcu->base + DCU_DIV_RATIO); -//640x480: 452/18 = 25.1 MHz - writel(17, dcu->base + DCU_DIV_RATIO); -#else - writel(9, dcu->base + DCU_DIV_RATIO); -#endif + ratio = calc_div_ratio(info); + writel(ratio, dcu->base + DCU_DIV_RATIO); //pixel clock polarity writel(DCU_SYN_POL_INV_PXCK(1) | DCU_SYN_POL_NEG(0) | |