diff options
author | Steve Twiss <stwiss.opensource@diasemi.com> | 2016-02-01 16:09:38 +0000 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2016-03-16 08:50:27 +0000 |
commit | bf742a53ce1eaca26849e22b013a9523621f8db5 (patch) | |
tree | 398d6e22713e36129798bb563b90d2e5ca5ae81f | |
parent | 2cd9ad0c5f5455f02815024229c1cb44d8ae636f (diff) |
mfd: da9062: Fix missing volatile registers in the core regmap_range volatile lists
Add an updated set of registers listed in the core regmap_range volatile
ranges defined for the DA9062.
These new registers contain bits that cannot be considered under the full
control of software. Under various conditions the hardware will set and/or
automatically clear bit(s) contained in these registers.
When using a cached version of regmap, the volatility of these registers must
be identified otherwise the regmap operations may not ensure the registers
are explicitly altered.
As well as updating the list of volatile registers, this change will fix a
corner case discovered in the DA9063 ONKEY which is used by the DA9062 core.
In the ONKEY case, the CONTROL_B register is now listed as volatile in the
regmap_range because it contains the bit field NONKEY_LOCK. This bit can be
altered by hardware, in which case regmap must be notified of its ability
to be manpiulated outside of software control.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r-- | drivers/mfd/da9062-core.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c index a9ad024ec6b0..8f873866ea60 100644 --- a/drivers/mfd/da9062-core.c +++ b/drivers/mfd/da9062-core.c @@ -388,11 +388,32 @@ static const struct regmap_range da9062_aa_volatile_ranges[] = { .range_min = DA9062AA_STATUS_D, .range_max = DA9062AA_EVENT_C, }, { - .range_min = DA9062AA_CONTROL_F, + .range_min = DA9062AA_CONTROL_A, + .range_max = DA9062AA_CONTROL_B, + }, { + .range_min = DA9062AA_CONTROL_E, .range_max = DA9062AA_CONTROL_F, }, { + .range_min = DA9062AA_BUCK2_CONT, + .range_max = DA9062AA_BUCK4_CONT, + }, { + .range_min = DA9062AA_BUCK3_CONT, + .range_max = DA9062AA_BUCK3_CONT, + }, { + .range_min = DA9062AA_LDO1_CONT, + .range_max = DA9062AA_LDO4_CONT, + }, { + .range_min = DA9062AA_DVC_1, + .range_max = DA9062AA_DVC_1, + }, { .range_min = DA9062AA_COUNT_S, .range_max = DA9062AA_SECOND_D, + }, { + .range_min = DA9062AA_SEQ, + .range_max = DA9062AA_SEQ, + }, { + .range_min = DA9062AA_EN_32K, + .range_max = DA9062AA_EN_32K, }, }; |