diff options
| author | Sammy He <r62914@freescale.com> | 2009-11-04 16:48:17 +0800 |
|---|---|---|
| committer | Alejandro Gonzalez <alex.gonzalez@digi.com> | 2010-02-12 17:19:30 +0100 |
| commit | 01d269d84d3536b7a9e896db807d7b13b9a48200 (patch) | |
| tree | 3c031f091c21fe27263f0e269b79412bc1c2c95b | |
| parent | 17df4a454cfdd418074e28985e427d67fc16913f (diff) | |
ENGR00118035 MX51: Fix the wrong register set for vpu software reset
Fix vpu software reset register setting wrong on MX51.
Signed-off-by: Sammy He <r62914@freescale.com>
| -rw-r--r-- | drivers/mxc/vpu/mxc_vpu.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/mxc/vpu/mxc_vpu.c b/drivers/mxc/vpu/mxc_vpu.c index ffc31b5ba7fa..24224dc95aef 100644 --- a/drivers/mxc/vpu/mxc_vpu.c +++ b/drivers/mxc/vpu/mxc_vpu.c @@ -457,14 +457,25 @@ static int vpu_ioctl(struct inode *inode, struct file *filp, u_int cmd, } case VPU_IOC_SYS_SW_RESET: { - if (cpu_is_mx37() || cpu_is_mx51()) { - u32 reg; + u32 reg; + if (cpu_is_mx37()) { reg = __raw_readl(src_base_addr); reg |= 0x02; /* SW_VPU_RST_BIT */ __raw_writel(reg, src_base_addr); while (__raw_readl(src_base_addr) & 0x02) ; + } else if (cpu_is_mx51()) { + /* mask interrupt due to vpu passed reset */ + reg = __raw_readl(src_base_addr + 5); + reg |= 0x02; + __raw_writel(reg, src_base_addr + 5); + + reg = __raw_readl(src_base_addr); + reg |= 0x5; /* warm reset vpu */ + __raw_writel(reg, src_base_addr); + while (__raw_readl(src_base_addr) & 0x04) + ; } break; } |