diff options
| author | Stéphane Dion <stephane.dion_1@nxp.com> | 2020-03-24 11:54:59 +0100 |
|---|---|---|
| committer | Franck LENORMAND <franck.lenormand@nxp.com> | 2020-04-22 15:56:40 +0200 |
| commit | 0f8db28dee324037610ad13fddb55b473251e9fa (patch) | |
| tree | 72d388374e7f1daa3fde7b2472d654bd8f346dd2 | |
| parent | 67fff80fb5cf9b68b8e24402ff713fecce45d76e (diff) | |
MLK-23674-1 imx: scu-pd: add V2X MU resources
Add the ID of the resources for the V2X MUs in order
for the MU to be powered up.
Signed-off-by: Stéphane Dion <stephane.dion_1@nxp.com>
| -rwxr-xr-x | drivers/firmware/imx/scu-pd.c | 5 | ||||
| -rw-r--r-- | include/dt-bindings/firmware/imx/rsrc.h | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 753a78951ab7..e737f2540bed 100755 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -266,6 +266,11 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* SECO SS */ { "seco_mu", IMX_SC_R_SECO_MU_2, 3, true, 2}, + /* V2X SS */ + { "v2x_mu", IMX_SC_R_V2X_MU_0, 2, true, 0}, + { "v2x_mu", IMX_SC_R_V2X_MU_2, 1, true, 2}, + { "v2x_mu", IMX_SC_R_V2X_MU_3, 2, true, 3}, + /* DB SS */ { "perf", IMX_SC_R_PERF, 1, false, 0}, }; diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h index 126760ab3b11..1deeae3f1180 100644 --- a/include/dt-bindings/firmware/imx/rsrc.h +++ b/include/dt-bindings/firmware/imx/rsrc.h @@ -39,9 +39,12 @@ #define IMX_SC_R_PERF 23 #define IMX_SC_R_USB_1_PHY 24 #define IMX_SC_R_DC_0_WARP 25 +#define IMX_SC_R_V2X_MU_0 26 +#define IMX_SC_R_V2X_MU_1 27 #define IMX_SC_R_DC_0_VIDEO0 28 #define IMX_SC_R_DC_0_VIDEO1 29 #define IMX_SC_R_DC_0_FRAC0 30 +#define IMX_SC_R_V2X_MU_2 31 #define IMX_SC_R_DC_0 32 #define IMX_SC_R_GPU_2_PID0 33 #define IMX_SC_R_DC_0_PLL_0 34 @@ -50,6 +53,8 @@ #define IMX_SC_R_DC_1_BLIT1 37 #define IMX_SC_R_DC_1_BLIT2 38 #define IMX_SC_R_DC_1_BLIT_OUT 39 +#define IMX_SC_R_V2X_MU_3 40 +#define IMX_SC_R_V2X_MU_4 41 #define IMX_SC_R_DC_1_WARP 42 #define IMX_SC_R_SECVIO 44 #define IMX_SC_R_DC_1_VIDEO0 45 |