Cortex-M3: Add support for the Microcontroller Prototyping System

This patch adds support for the ARM Microcontroller Prototyping System
platform which support Cortex-M0 and Cortex-M3 processors.

Based on work done by Klaus Gysbers @ ARM.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

25 files changed, 1276 insertions, 2 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e3877f34d1fb..c34850140024 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -552,6 +552,19 @@ config ARCH_MSM
 	  interface to the ARM9 modem processor which runs the baseband stack
 	  and controls some vital subsystems (clock and power control, etc).
 
+config ARCH_MPS
+	bool "ARM Ltd. Microcontroller Prototyping System"
+	depends on !MMU
+	select ARM_AMBA
+	select HAVE_CLK
+	select COMMON_CLKDEV
+	select ICST307
+	select GENERIC_TIME
+	select GENERIC_CLOCKEVENTS
+	help
+	  This enables support for ARM Ltd. Microcontroller Prototyping
+	  System platform.
+
 endchoice
 
 source "arch/arm/mach-clps711x/Kconfig"
@@ -630,6 +643,8 @@ source "arch/arm/mach-ks8695/Kconfig"
 
 source "arch/arm/mach-msm/Kconfig"
 
+source "arch/arm/mach-mps/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
 	bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4e9e089915ea..716c6d2a7688 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -158,6 +158,7 @@ endif
  machine-$(CONFIG_ARCH_MSM)	   := msm
  machine-$(CONFIG_ARCH_LOKI)       := loki
  machine-$(CONFIG_ARCH_MV78XX0)    := mv78xx0
+ machine-$(CONFIG_ARCH_MPS)	   := mps
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e38ca7038168..664cf4512e87 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -109,7 +109,9 @@ struct stack {
 	u32 und[3];
 } ____cacheline_aligned;
 
+#ifndef CONFIG_CPU_V7M
 static struct stack stacks[NR_CPUS];
+#endif
 
 char elf_platform[ELF_PLATFORM_SIZE];
 EXPORT_SYMBOL(elf_platform);
@@ -334,6 +336,7 @@ static void __init setup_processor(void)
  */
 void cpu_init(void)
 {
+#ifndef CONFIG_CPU_V7M
 	unsigned int cpu = smp_processor_id();
 	struct stack *stk = &stacks[cpu];
 
@@ -352,7 +355,6 @@ void cpu_init(void)
 #define PLC	"I"
 #endif
 
-#ifndef CONFIG_CPU_V7M
 	/*
 	 * setup stacks for re-entrant exception handlers
 	 */
diff --git a/arch/arm/mach-mps/Kconfig b/arch/arm/mach-mps/Kconfig
new file mode 100644
index 000000000000..b5c1651eec37
--- /dev/null
+++ b/arch/arm/mach-mps/Kconfig
@@ -0,0 +1,11 @@
+if ARCH_MPS
+
+config MACH_MPS
+	bool
+	default y
+	select ARM_NVIC if CPU_V7M
+	help
+	  Include support for the ARM Ltd. Microcontroller Prototyping
+	  System platform.
+
+endif
diff --git a/arch/arm/mach-mps/Makefile b/arch/arm/mach-mps/Makefile
new file mode 100644
index 000000000000..38bde634fc84
--- /dev/null
+++ b/arch/arm/mach-mps/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the linux kernel.
+#
+
+obj-y					:= core.o clock.o
+obj-$(CONFIG_MACH_MPS)			+= board-mps.o
diff --git a/arch/arm/mach-mps/Makefile.boot b/arch/arm/mach-mps/Makefile.boot
new file mode 100644
index 000000000000..8842bf950bdd
--- /dev/null
+++ b/arch/arm/mach-mps/Makefile.boot
@@ -0,0 +1,3 @@
+   zreladdr-y	:= 0x10008000
+params_phys-y	:= 0x10000100
+initrd_phys-y	:= 0x10800000
diff --git a/arch/arm/mach-mps/board-mps.c b/arch/arm/mach-mps/board-mps.c
new file mode 100644
index 000000000000..03c1544893a5
--- /dev/null
+++ b/arch/arm/mach-mps/board-mps.c
@@ -0,0 +1,191 @@
+/*
+ *  linux/arch/arm/mach-mps/board_mps.c
+ *
+ *  Copyright (C) 2009 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+
+#include <mach/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/nvic.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach/time.h>
+
+#include <mach/platform.h>
+#include <mach/irqs.h>
+
+#include "core.h"
+#include "clock.h"
+
+#if PAGE_OFFSET != PHYS_OFFSET
+#error "PAGE_OFFSET != PHYS_OFFSET"
+#endif
+
+static void __init mps_map_io(void)
+{
+}
+
+/*
+ * MPS AMBA devices
+ */
+
+#define GPIO2_IRQ	{ IRQ_MPS_GPIO2, NO_IRQ }
+#define GPIO3_IRQ	{ IRQ_MPS_GPIO3, NO_IRQ }
+
+#define AACI_IRQ	{ IRQ_MPS_AACI, NO_IRQ }
+#define MMCI_IRQ	{ IRQ_MPS_MMCIA, IRQ_MPS_MMCIB }
+
+#define SMC_IRQ		{ NO_IRQ, NO_IRQ }
+#define MPMC_IRQ	{ NO_IRQ, NO_IRQ }
+#define CLCD_IRQ	{ IRQ_MPS_CLCD, NO_IRQ }
+
+#define SCTL_IRQ	{ NO_IRQ, NO_IRQ }
+#define WATCHDOG_IRQ	{ IRQ_MPS_WDOG, NO_IRQ }
+#define GPIO0_IRQ	{ IRQ_MPS_GPIO0, NO_IRQ }
+#define GPIO1_IRQ	{ IRQ_MPS_GPIO1, NO_IRQ }
+#define RTC_IRQ		{ IRQ_MPS_RTC, NO_IRQ }
+
+#define UART0_IRQ	{ IRQ_MPS_UART0, NO_IRQ }
+#define UART1_IRQ	{ IRQ_MPS_UART1, NO_IRQ }
+#define UART2_IRQ	{ IRQ_MPS_UART2, NO_IRQ }
+#define UART3_IRQ	{ IRQ_MPS_UART3, NO_IRQ }
+#define SPI_IRQ		{ IRQ_MPS_SPI, NO_IRQ }
+
+/* FPGA Primecells */
+AMBA_DEVICE(aaci,  "fpga:04", AACI,	NULL);
+AMBA_DEVICE(mmc0,  "fpga:05", MMCI,	&mps_mmc0_plat_data);
+AMBA_DEVICE(uart3, "fpga:09", UART3,	NULL);
+
+/* DevChip Primecells */
+AMBA_DEVICE(smc,   "dev:00",  SMC,	NULL);
+AMBA_DEVICE(clcd,  "dev:20",  CLCD,	&clcd_plat_data);
+AMBA_DEVICE(sctl,  "dev:e0",  SCTL,	NULL);
+AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG,	NULL);
+AMBA_DEVICE(rtc,   "dev:e8",  RTC,	NULL);
+AMBA_DEVICE(uart0, "dev:f1",  UART0,	NULL);
+AMBA_DEVICE(uart1, "dev:f2",  UART1,	NULL);
+AMBA_DEVICE(uart2, "dev:f3",  UART2,	NULL);
+AMBA_DEVICE(spi,   "dev:f4",  SPI,	NULL);
+
+static struct amba_device *amba_devs[] __initdata = {
+	&mmc0_device,
+	&uart0_device,
+	&uart1_device,
+	&uart2_device,
+	&uart3_device,
+	&smc_device,
+	&clcd_device,
+	&sctl_device,
+	&wdog_device,
+	&rtc_device,
+	&spi_device,
+	&aaci_device,
+};
+
+/*
+ * MPS platform devices
+ */
+static struct resource mps_flash_resource = {
+	.start			= MPS_FLASH_BASE,
+	.end			= MPS_FLASH_BASE + MPS_FLASH_SIZE - 1,
+	.flags			= IORESOURCE_MEM,
+};
+
+static struct resource mps_eth_resources[] = {
+	[0] = {
+		.start		= MPS_ETH_BASE,
+		.end		= MPS_ETH_BASE + SZ_64K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start		= IRQ_MPS_ETH,
+		.end		= IRQ_MPS_ETH,
+		.flags		= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device mps_eth_device = {
+	.name		= "smsc911x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(mps_eth_resources),
+	.resource	= mps_eth_resources,
+};
+
+static void __init gic_init_irq(void)
+{
+	nvic_init();
+}
+
+static void __init timer_init(void)
+{
+	unsigned int timer_irq;
+
+	timer0_va_base = __io_address(MPS_TIMER0_1_BASE);
+	timer1_va_base = __io_address(MPS_TIMER0_1_BASE) + 0x20;
+	timer2_va_base = __io_address(MPS_TIMER2_3_BASE);
+	timer3_va_base = __io_address(MPS_TIMER2_3_BASE) + 0x20;
+
+	timer_irq = IRQ_MPS_TIMER0_1;
+
+	mps_timer_init(timer_irq);
+}
+
+static struct sys_timer mps_timer = {
+	.init		= timer_init,
+};
+
+static void __init mps_init(void)
+{
+    int i;
+    clk_register(&mps_clcd_clk);
+
+    mps_flash_register(&mps_flash_resource, 1);
+    platform_device_register(&mps_i2c_device);
+    platform_device_register(&mps_eth_device);
+
+    for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+        struct amba_device *d = amba_devs[i];
+        amba_device_register(d, &iomem_resource);
+    }
+
+#ifdef CONFIG_LEDS
+    leds_event = mps_leds_event;
+#endif
+}
+
+MACHINE_START(MPS, "ARM MPS")
+	.phys_io	= MPS_UART0_BASE,
+	.io_pg_offst	= (IO_ADDRESS(MPS_UART0_BASE) >> 18) & 0xfffc,
+	.boot_params	= PHYS_OFFSET + 0x100,
+	.map_io		= mps_map_io,
+	.init_irq	= gic_init_irq,
+	.timer		= &mps_timer,
+	.init_machine	= mps_init,
+MACHINE_END
diff --git a/arch/arm/mach-mps/clock.c b/arch/arm/mach-mps/clock.c
new file mode 100644
index 000000000000..d459efc2c2e2
--- /dev/null
+++ b/arch/arm/mach-mps/clock.c
@@ -0,0 +1,131 @@
+/*
+ *  linux/arch/arm/mach-mps/clock.c
+ *
+ *  Copyright (C) 2004 ARM Limited.
+ *  Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/mutex.h>
+
+#include <asm/hardware/icst307.h>
+
+#include "clock.h"
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	struct clk *p, *clk = ERR_PTR(-ENOENT);
+
+	mutex_lock(&clocks_mutex);
+	list_for_each_entry(p, &clocks, node) {
+		if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
+			clk = p;
+			break;
+		}
+	}
+	mutex_unlock(&clocks_mutex);
+
+	return clk;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+	module_put(clk->owner);
+}
+EXPORT_SYMBOL(clk_put);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+	return rate;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+	int ret = -EIO;
+
+	if (clk->setvco) {
+		struct icst307_vco vco;
+
+		vco = icst307_khz_to_vco(clk->params, rate / 1000);
+		clk->rate = icst307_khz(clk->params, vco) * 1000;
+
+		clk->setvco(clk, vco);
+		ret = 0;
+	}
+	return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+/*
+ * These are fixed clocks.
+ */
+static struct clk kmi_clk = {
+	.name	= "KMIREFCLK",
+	.rate	= 24000000,
+};
+
+static struct clk uart_clk = {
+	.name	= "UARTCLK",
+	.rate	= 24000000,
+};
+
+static struct clk mmci_clk = {
+	.name	= "MCLK",
+	.rate	= 24000000,
+};
+
+int clk_register(struct clk *clk)
+{
+	mutex_lock(&clocks_mutex);
+	list_add(&clk->node, &clocks);
+	mutex_unlock(&clocks_mutex);
+	return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+void clk_unregister(struct clk *clk)
+{
+	mutex_lock(&clocks_mutex);
+	list_del(&clk->node);
+	mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clk_unregister);
+
+static int __init clk_init(void)
+{
+	clk_register(&kmi_clk);
+	clk_register(&uart_clk);
+	clk_register(&mmci_clk);
+	return 0;
+}
+arch_initcall(clk_init);
diff --git a/arch/arm/mach-mps/clock.h b/arch/arm/mach-mps/clock.h
new file mode 100644
index 000000000000..dadba695e181
--- /dev/null
+++ b/arch/arm/mach-mps/clock.h
@@ -0,0 +1,25 @@
+/*
+ *  linux/arch/arm/mach-realview/clock.h
+ *
+ *  Copyright (C) 2004 ARM Limited.
+ *  Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+struct module;
+struct icst307_params;
+
+struct clk {
+	struct list_head	node;
+	unsigned long		rate;
+	struct module		*owner;
+	const char		*name;
+	const struct icst307_params *params;
+	void			*data;
+	void			(*setvco)(struct clk *, struct icst307_vco vco);
+};
+
+int clk_register(struct clk *clk);
+void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-mps/core.c b/arch/arm/mach-mps/core.c
new file mode 100644
index 000000000000..090b5fe2fa56
--- /dev/null
+++ b/arch/arm/mach-mps/core.c
@@ -0,0 +1,386 @@
+/*
+ *  linux/arch/arm/mach-mps/core.c
+ *
+ *  Copyright (C) 2009 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/io.h>
+#include <linux/smsc911x.h>
+#include <linux/ata_platform.h>
+#include <linux/delay.h>
+
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/arm_timer.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+
+#include <mach/platform.h>
+#include <mach/hardware.h>
+
+#include <asm/hardware/gic.h>
+
+#include "clock.h"
+#include "core.h"
+
+#define MPS_REFCOUNTER	(__io_address(MPS_SYS_BASE) + MPS_SYS_CNT25MHz_OFFSET)
+
+/*
+ * This is the MPS sched_clock implementation. This has a resolution of 40ns.
+ */
+unsigned long long sched_clock(void)
+{
+	return (unsigned long long)readl(MPS_REFCOUNTER) * 40;
+}
+
+#define MPS_FLASHCTRL    (__io_address(MPS_SYS_BASE) + MPS_SYS_FLASH_OFFSET)
+
+static struct flash_platform_data mps_flash_data = {
+	.map_name		= "cfi_probe",
+	.width			= 4,
+};
+
+struct platform_device mps_flash_device = {
+	.name			= "armflash",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= &mps_flash_data,
+	},
+};
+
+int mps_flash_register(struct resource *res, u32 num)
+{
+	mps_flash_device.resource = res;
+	mps_flash_device.num_resources = num;
+	return platform_device_register(&mps_flash_device);
+}
+
+static struct smsc911x_platform_config smsc911x_config = {
+	.flags		= SMSC911X_USE_32BIT,
+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
+	.phy_interface	= PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device mps_eth_device = {
+	.name		= "smsc911x",
+	.id		= 0,
+	.num_resources	= 2,
+};
+
+int mps_eth_register(const char *name, struct resource *res)
+{
+	if (name)
+		mps_eth_device.name = name;
+	mps_eth_device.resource = res;
+	if (strcmp(mps_eth_device.name, "smsc911x") == 0)
+		mps_eth_device.dev.platform_data = &smsc911x_config;
+
+	return platform_device_register(&mps_eth_device);
+}
+
+struct platform_device mps_usb_device = {
+	.name			= "isp1760",
+	.num_resources		= 2,
+};
+
+int mps_usb_register(struct resource *res)
+{
+	mps_usb_device.resource = res;
+	return platform_device_register(&mps_usb_device);
+}
+
+static struct resource mps_i2c_resource = {
+	.start		= MPS_I2C_BASE,
+	.end		= MPS_I2C_BASE + SZ_4K - 1,
+	.flags		= IORESOURCE_MEM,
+};
+
+struct platform_device mps_i2c_device = {
+	.name		= "versatile-i2c",
+	.id		= 0,
+	.num_resources	= 1,
+	.resource	= &mps_i2c_resource,
+};
+
+static struct i2c_board_info mps_i2c_board_info[] = {
+	{
+		I2C_BOARD_INFO("rtc-ds1307", 0xd0 >> 1),
+		.type = "ds1338",
+	},
+};
+
+static int __init mps_i2c_init(void)
+{
+	return i2c_register_board_info(0, mps_i2c_board_info,
+				       ARRAY_SIZE(mps_i2c_board_info));
+}
+arch_initcall(mps_i2c_init);
+
+static unsigned int mps_mmc_status(struct device *dev)
+{
+	return readl(__io_address(MPS_MMCI_BASE)) & 1;
+}
+
+struct mmc_platform_data mps_mmc0_plat_data = {
+	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
+	.status		= mps_mmc_status,
+};
+ 
+struct clk mps_clcd_clk = {
+	.name	= "CLCDCLK",
+};
+
+static struct clcd_panel vga = {
+	.mode		= {
+		.name		= "VGA",
+		.refresh	= 60,
+		.xres		= 640,
+		.yres		= 480,
+		.pixclock	= 39721,
+		.left_margin	= 64,
+		.right_margin	= 16,
+		.upper_margin	= 13,
+		.lower_margin	= 3,
+		.hsync_len	= 80,
+		.vsync_len	= 4,
+		.sync		= 0,
+		.vmode		= FB_VMODE_NONINTERLACED,
+	},
+	.width		= -1,
+	.height		= -1,
+	.tim2		= TIM2_BCD | TIM2_IPC,
+	.cntl		= CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
+	.bpp		= 16,
+};
+
+static int mps_clcd_setup(struct clcd_fb *fb)
+{
+	fb->panel		= &vga;
+	fb->fb.fix.smem_start	= (unsigned long)MPS_DMC_BASE;
+	fb->fb.screen_base	= (char __iomem *)MPS_DMC_BASE;
+	fb->fb.fix.smem_len	= 640 * 480 * 2;	/* VGA, 16bpp */
+
+	return 0;
+}
+
+static int mps_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+	return dma_mmap_writecombine(&fb->dev->dev, vma,
+				     fb->fb.screen_base,
+				     fb->fb.fix.smem_start,
+				     fb->fb.fix.smem_len);
+}
+
+static void mps_clcd_remove(struct clcd_fb *fb)
+{
+}
+
+struct clcd_board clcd_plat_data = {
+	.name		= "MPS",
+	.check		= clcdfb_check,
+	.decode		= clcdfb_decode,
+	.setup		= mps_clcd_setup,
+	.mmap		= mps_clcd_mmap,
+	.remove		= mps_clcd_remove,
+};
+
+/*
+ * Where is the timer (VA)?
+ */
+void __iomem *timer0_va_base;
+void __iomem *timer1_va_base;
+void __iomem *timer2_va_base;
+void __iomem *timer3_va_base;
+
+/*
+ * How long is the timer interval?
+ */
+#define TIMER_INTERVAL	(TICKS_PER_uSEC * mSEC_10)
+#if TIMER_INTERVAL >= 0x100000
+#define TIMER_RELOAD	(TIMER_INTERVAL >> 8)
+#define TIMER_DIVISOR	(TIMER_CTRL_DIV256)
+#define TICKS2USECS(x)	(256 * (x) / TICKS_PER_uSEC)
+#elif TIMER_INTERVAL >= 0x10000
+#define TIMER_RELOAD	(TIMER_INTERVAL >> 4)		/* Divide by 16 */
+#define TIMER_DIVISOR	(TIMER_CTRL_DIV16)
+#define TICKS2USECS(x)	(16 * (x) / TICKS_PER_uSEC)
+#else
+#define TIMER_RELOAD	(TIMER_INTERVAL)
+#define TIMER_DIVISOR	(TIMER_CTRL_DIV1)
+#define TICKS2USECS(x)	((x) / TICKS_PER_uSEC)
+#endif
+
+static void timer_set_mode(enum clock_event_mode mode,
+			   struct clock_event_device *clk)
+{
+	unsigned long ctrl;
+
+	switch(mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		writel(TIMER_RELOAD, timer0_va_base + TIMER_LOAD);
+
+		ctrl = TIMER_CTRL_PERIODIC;
+		ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+		/* period set, and timer enabled in 'next_event' hook */
+		ctrl = TIMER_CTRL_ONESHOT;
+		ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE;
+		break;
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	default:
+		ctrl = 0;
+	}
+
+	writel(ctrl, timer0_va_base + TIMER_CTRL);
+}
+
+static int timer_set_next_event(unsigned long evt,
+				struct clock_event_device *unused)
+{
+	unsigned long ctrl = readl(timer0_va_base + TIMER_CTRL);
+
+	writel(evt, timer0_va_base + TIMER_LOAD);
+	writel(ctrl | TIMER_CTRL_ENABLE, timer0_va_base + TIMER_CTRL);
+
+	return 0;
+}
+
+static struct clock_event_device timer0_clockevent =	 {
+	.name		= "timer0",
+	.shift		= 32,
+	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+	.set_mode	= timer_set_mode,
+	.set_next_event	= timer_set_next_event,
+	.rating		= 300,
+	.cpumask	= CPU_MASK_ALL,
+};
+
+static void __init mps_clockevents_init(unsigned int timer_irq)
+{
+	timer0_clockevent.irq = timer_irq;
+	timer0_clockevent.mult =
+		div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift);
+	timer0_clockevent.max_delta_ns =
+		clockevent_delta2ns(0xffffffff, &timer0_clockevent);
+	timer0_clockevent.min_delta_ns =
+		clockevent_delta2ns(0xf, &timer0_clockevent);
+
+	clockevents_register_device(&timer0_clockevent);
+}
+
+/*
+ * IRQ handler for the timer
+ */
+static irqreturn_t mps_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = &timer0_clockevent;
+
+	/* clear the interrupt */
+	writel(1, timer0_va_base + TIMER_INTCLR);
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction mps_timer_irq = {
+	.name		= "MPS Timer Tick",
+	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+	.handler	= mps_timer_interrupt,
+};
+
+static cycle_t mps_get_cycles(void)
+{
+	return ~readl(timer3_va_base + TIMER_VALUE);
+}
+
+static struct clocksource clocksource_mps = {
+	.name	= "timer3",
+	.rating	= 200,
+	.read	= mps_get_cycles,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.shift	= 20,
+	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static void __init mps_clocksource_init(void)
+{
+	/* setup timer 0 as free-running clocksource */
+	writel(0, timer3_va_base + TIMER_CTRL);
+	writel(0xffffffff, timer3_va_base + TIMER_LOAD);
+	writel(0xffffffff, timer3_va_base + TIMER_VALUE);
+	writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
+		timer3_va_base + TIMER_CTRL);
+
+	clocksource_mps.mult =
+		clocksource_khz2mult(1000, clocksource_mps.shift);
+	clocksource_register(&clocksource_mps);
+}
+
+/*
+ * Set up the clock source and clock events devices
+ */
+void __init mps_timer_init(unsigned int timer_irq)
+{
+	u32 val;
+
+	/* 
+	 * set clock frequency: 
+	 *	MPS_REFCLK is 32KHz
+	 *	MPS_TIMCLK is 1MHz
+	 */
+	val = readl(__io_address(MPS_SCTL_BASE));
+	writel((MPS_TIMCLK << MPS_TIMER1_EnSel) |
+	       (MPS_TIMCLK << MPS_TIMER2_EnSel) | 
+	       (MPS_TIMCLK << MPS_TIMER3_EnSel) |
+	       (MPS_TIMCLK << MPS_TIMER4_EnSel) | val,
+	       __io_address(MPS_SCTL_BASE));
+
+	/*
+	 * Initialise to a known state (all timers off)
+	 */
+	writel(0, timer0_va_base + TIMER_CTRL);
+	writel(0, timer1_va_base + TIMER_CTRL);
+	writel(0, timer2_va_base + TIMER_CTRL);
+	writel(0, timer3_va_base + TIMER_CTRL);
+
+	/* 
+	 * Make irqs happen for the system timer
+	 */
+	setup_irq(timer_irq, &mps_timer_irq);
+
+	mps_clocksource_init();
+	mps_clockevents_init(timer_irq);
+}
diff --git a/arch/arm/mach-mps/core.h b/arch/arm/mach-mps/core.h
new file mode 100644
index 000000000000..051a994acb0d
--- /dev/null
+++ b/arch/arm/mach-mps/core.h
@@ -0,0 +1,69 @@
+/*
+ *  linux/arch/arm/mach-mps/core.h
+ *
+ *  Copyright (C) 2004 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_MPS_H
+#define __ASM_ARCH_MPS_H
+
+#include <linux/amba/bus.h>
+#include <linux/io.h>
+
+#include <asm/leds.h>
+
+#define AMBA_DEVICE(name,busid,base,plat)			\
+static struct amba_device name##_device = {			\
+	.dev		= {					\
+		.coherent_dma_mask = ~0,			\
+		.bus_id	= busid,				\
+		.platform_data = plat,				\
+	},							\
+	.res		= {					\
+		.start	= MPS_##base##_BASE,			\
+		.end	= (MPS_##base##_BASE) + SZ_4K - 1,	\
+		.flags	= IORESOURCE_MEM,			\
+	},							\
+	.dma_mask	= ~0,					\
+	.irq		= base##_IRQ,				\
+	/* .dma		= base##_DMA,*/				\
+}
+
+extern struct platform_device mps_flash_device;
+extern struct platform_device mps_cf_device;
+extern struct platform_device mps_i2c_device;
+extern struct mmc_platform_data mps_mmc0_plat_data;
+extern struct mmc_platform_data mps_mmc1_plat_data;
+extern struct clk mps_clcd_clk;
+extern struct clcd_board clcd_plat_data;
+extern void __iomem *gic_cpu_base_addr;
+#ifdef CONFIG_LOCAL_TIMERS
+extern void __iomem *twd_base;
+#endif
+extern void __iomem *timer0_va_base;
+extern void __iomem *timer1_va_base;
+extern void __iomem *timer2_va_base;
+extern void __iomem *timer3_va_base;
+
+extern void mps_leds_event(led_event_t ledevt);
+extern void mps_timer_init(unsigned int timer_irq);
+extern int mps_flash_register(struct resource *res, u32 num);
+extern int mps_eth_register(const char *name, struct resource *res);
+extern int mps_usb_register(struct resource *res);
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/debug-macro.S b/arch/arm/mach-mps/include/mach/debug-macro.S
new file mode 100644
index 000000000000..e6e2c13687ea
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/debug-macro.S
@@ -0,0 +1,19 @@
+/* 
+ * arch/arm/mach-mps/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 2009 ARM Ltd.
+ *  Copyright (C) 1994-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+	.macro	addruart,rx
+	mov	\rx,      #0x40000000
+	orr	\rx, \rx, #0x00006000
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-mps/include/mach/dma.h b/arch/arm/mach-mps/include/mach/dma.h
new file mode 100644
index 000000000000..291143e64bf1
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/dma.h
@@ -0,0 +1,18 @@
+/*
+ * arch/arm/mach-mps/include/mach/dma.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
diff --git a/arch/arm/mach-mps/include/mach/entry-macro.S b/arch/arm/mach-mps/include/mach/entry-macro.S
new file mode 100644
index 000000000000..a531a4ca9100
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/entry-macro.S
@@ -0,0 +1,21 @@
+/*
+ * arch/arm/mach-mps/include/mach/entry-macro.S
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+	.macro  arch_ret_to_user, tmp1, tmp2
+	.endm
diff --git a/arch/arm/mach-mps/include/mach/hardware.h b/arch/arm/mach-mps/include/mach/hardware.h
new file mode 100644
index 000000000000..c251699ca806
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/hardware.h
@@ -0,0 +1,31 @@
+/*
+ * arch/arm/mach-mps/include/mach/hardware.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/sizes.h>
+
+#ifdef CONFIG_MMU
+#error "ARM MPS platform only support !MMU"
+#endif
+
+#define IO_ADDRESS(x)		(x)
+#define __io_address(n)		__io(IO_ADDRESS(n))
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/io.h b/arch/arm/mach-mps/include/mach/io.h
new file mode 100644
index 000000000000..583850e08d91
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/io.h
@@ -0,0 +1,32 @@
+/*
+ * arch/arm/mach-mps/include/mach/io.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+static inline void __iomem *__io(unsigned long addr)
+{
+	return (void __iomem *)addr;
+}
+
+#define __io(a)			__io(a)
+#define __mem_pci(a)		(a)
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/irqs.h b/arch/arm/mach-mps/include/mach/irqs.h
new file mode 100644
index 000000000000..eb73a8acf7e7
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/irqs.h
@@ -0,0 +1,49 @@
+/*
+ * arch/arm/mach-mps/include/mach/irqs.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+/*
+ * MPS interrupt sources
+ */
+#define IRQ_MPS_WDOG		0	/* Watchdog timer */
+#define IRQ_MPS_RTC		1	/* Real Time Clock */
+#define IRQ_MPS_TIMER0_1	2	/* Timer 0 and 1 */
+#define IRQ_MPS_TIMER2_3	3	/* Timer 2 and 3 */
+#define IRQ_MPS_MMCIA		4	/* Multimedia Card A */
+#define IRQ_MPS_MMCIB		5	/* Multimedia Card B */
+#define IRQ_MPS_UART0		6	/* UART 0 on development chip */
+#define IRQ_MPS_UART1		7	/* UART 1 on development chip */
+#define IRQ_MPS_UART2		8	/* UART 2 on development chip */
+					/* Reserved */
+#define IRQ_MPS_AACI		10	/* Audio Codec */
+#define IRQ_MPS_CLCD		11	/* CLCD controller */
+#define IRQ_MPS_ETH		12	/* Ethernet controller */
+#define IRQ_MPS_USB		13	/* USB controller */
+#define IRQ_MPS_USB_HC		14	/* USB controller */
+#define IRQ_MPS_CHARLCD		15	/* Character LCD */
+					/* 16 - 29 reserved */
+#define IRQ_MPS_UART3		30	/* UART 3 on development chip */
+#define IRQ_MPS_SPI		31	/* Touchscreen */
+
+#define NR_IRQS			32
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/memory.h b/arch/arm/mach-mps/include/mach/memory.h
new file mode 100644
index 000000000000..bb63833a1ee7
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/memory.h
@@ -0,0 +1,34 @@
+/*
+ * arch/arm/mach-mps/include/mach/memory.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET		UL(0x10000000)
+
+/*
+ * Virtual view <-> DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *              address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *              to an address that the kernel can use.
+ */
+#define __virt_to_bus(x)	__virt_to_phys(x)
+#define __bus_to_virt(x)	__phys_to_virt(x)
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/platform.h b/arch/arm/mach-mps/include/mach/platform.h
new file mode 100644
index 000000000000..78dccb3d6cbe
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/platform.h
@@ -0,0 +1,91 @@
+/*
+ * arch/arm/mach-mps/include/mach/platform.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_PLATFORM_H
+#define __ASM_ARCH_PLATFORM_H
+
+/*
+ * MPS system registers
+ */
+#define MPS_SYS_BASE		0x40000000
+#define MPS_SYS_ID_OFFSET	0x00		/* Board and FPGA identifier */
+#define MPS_SYS_PERCFG_OFFSET	0x04		/* Peripheral control signals */
+#define MPS_SYS_SW_OFFSET	0x08		/* Indicates user switch settings */
+#define MPS_SYS_LED_OFFSET	0x0C		/* Sets LED outputs */
+#define MPS_SYS_7SEG_OFFSET	0x10		/* Sets LED outputs */
+#define MPS_SYS_CNT25MHz_OFFSET	0x14		/* Free running counter incrementing at 25MHz */
+#define MPS_SYS_CNT100Hz_OFFSET	0x18		/* Free running counter incrementing at 100Hz */
+
+/*
+ * MPS peripheral addresses
+ */
+#define MPS_FLASH_BASE		0x18000000
+#define MPS_FLASH_SIZE		SZ_64M
+
+#define MPS_SPI_BASE		0x1F004000	/* Touchscreen */
+#define MPS_UART3_BASE		0x1F005000	/* UART 3 */
+
+#define MPS_WATCHDOG_BASE	0x40000000	/* watchdog interface */
+#define MPS_RTC_BASE		0x40001000	/* Real Time Clock */
+#define MPS_TIMER0_1_BASE	0x40002000	/* Timer 0 and 1 */
+#define MPS_TIMER2_3_BASE	0x40003000	/* Timer 2 and 3 */
+#define MPS_SCTL_BASE		0x40004000	/* System controller */
+#define MPS_MMCI_BASE		0x40005000	/* MMC interface */
+#define MPS_UART0_BASE		0x40006000	/* UART 0 */
+#define MPS_UART1_BASE		0x40007000	/* UART 1 */
+#define MPS_UART2_BASE		0x40008000	/* UART 2 */
+						/* Reserved */
+#define MPS_AACI_BASE		0x4000A000	/* Audio */
+#define MPS_I2C_BASE		0x4000B000	/* I2C control */
+#define MPS_CHAR_LCD_BASE	0x4000C000	/* Character LCD */
+
+#define MPS_ETH_BASE		0x4FFE0000	/* Ethernet */
+#define MPS_CLCD_BASE		0x4FFF0000	/* CLCD */
+
+#define MPS_DMC_BASE		0x60000000	/* Dynamic Memory Controller */
+
+#define MPS_SMC_BASE		0xA0000000	/* Static Memory Controller */
+//#define MPS_USB_BASE		0xA0000000	/* USB */
+
+/*
+ * System controller bit assignment
+ */
+#define MPS_REFCLK		0
+#define MPS_TIMCLK		1
+
+#define MPS_TIMER1_EnSel	15
+#define MPS_TIMER2_EnSel	17
+#define MPS_TIMER3_EnSel	19
+#define MPS_TIMER4_EnSel	21
+
+#define MAX_TIMER		2
+#define MAX_PERIOD		699050
+#define TICKS_PER_uSEC		1
+
+/* 
+ *  These are useconds NOT ticks.  
+ */
+#define mSEC_1                          1000
+#define mSEC_5                          (mSEC_1 * 5)
+#define mSEC_10                         (mSEC_1 * 10)
+#define mSEC_25                         (mSEC_1 * 25)
+#define SEC_1                           (mSEC_1 * 1000)
+
+#endif	/* __ASM_ARCH_PLATFORM_H */
diff --git a/arch/arm/mach-mps/include/mach/system.h b/arch/arm/mach-mps/include/mach/system.h
new file mode 100644
index 000000000000..e241770e1184
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/system.h
@@ -0,0 +1,35 @@
+/*
+ * arch/arm/mach-mps/include/mach/system.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <linux/io.h>
+#include <mach/hardware.h>
+#include <mach/platform.h>
+
+static inline void arch_idle(void)
+{
+	cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+}
+
+#endif
diff --git a/arch/arm/mach-mps/include/mach/timex.h b/arch/arm/mach-mps/include/mach/timex.h
new file mode 100644
index 000000000000..91792e8aa490
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/timex.h
@@ -0,0 +1,20 @@
+/*
+ * arch/arm/mach-mps/include/mach/timex.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#define CLOCK_TICK_RATE		(50000000 / 16)
diff --git a/arch/arm/mach-mps/include/mach/uncompress.h b/arch/arm/mach-mps/include/mach/uncompress.h
new file mode 100644
index 000000000000..ecc59ec5c78b
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/uncompress.h
@@ -0,0 +1,62 @@
+/*
+ * arch/arm/mach-realview/include/mach/uncompress.h
+ *
+ * Copyright (C) 2009 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+
+#include <mach/platform.h>
+
+#define AMBA_UART_DR(base)	(*(volatile unsigned char *)((base) + 0x00))
+#define AMBA_UART_LCRH(base)	(*(volatile unsigned char *)((base) + 0x2c))
+#define AMBA_UART_CR(base)	(*(volatile unsigned char *)((base) + 0x30))
+#define AMBA_UART_FR(base)	(*(volatile unsigned char *)((base) + 0x18))
+
+/*
+ * Return the UART base address
+ */
+static inline unsigned long get_uart_base(void)
+{
+	return MPS_UART0_BASE;
+}
+
+/*
+ * This does not append a newline
+ */
+static inline void putc(int c)
+{
+	unsigned long base = get_uart_base();
+
+	while (AMBA_UART_FR(base) & (1 << 5))
+		barrier();
+
+	AMBA_UART_DR(base) = c;
+}
+
+static inline void flush(void)
+{
+	unsigned long base = get_uart_base();
+
+	while (AMBA_UART_FR(base) & (1 << 3))
+		barrier();
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-mps/include/mach/vmalloc.h b/arch/arm/mach-mps/include/mach/vmalloc.h
new file mode 100644
index 000000000000..fe0de1b507ac
--- /dev/null
+++ b/arch/arm/mach-mps/include/mach/vmalloc.h
@@ -0,0 +1,21 @@
+/*
+ *  arch/arm/mach-realview/include/mach/vmalloc.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#define VMALLOC_END		0xf8000000
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 887e1eadf8fc..bc02d607cb3d 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -443,7 +443,7 @@ config CPU_V7
 # ARMv7
 config CPU_V7M
 	bool "Support ARMv7-M processors"
-	depends on MACH_REALVIEW_EB && EXPERIMENTAL
+	depends on MACH_MPS
 	select THUMB2_KERNEL
 	select ARM_THUMB
 	select CPU_32v7M
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 43aa2020f85c..1490ad3474d4 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1899,3 +1899,4 @@ rut100			MACH_RUT100		RUT100			1908
 asusp535		MACH_ASUSP535		ASUSP535		1909
 htcraphael		MACH_HTCRAPHAEL		HTCRAPHAEL		1910
 sygdg1			MACH_SYGDG1		SYGDG1			1911
+mps			MACH_MPS		MPS			10000