diff options
author | Anshul Jain <anshulj@nvidia.com> | 2013-07-18 17:11:36 -0700 |
---|---|---|
committer | Varun Colbert <vcolbert@nvidia.com> | 2013-07-20 22:13:01 -0700 |
commit | 1cd2d56b6161d889c0a4e02043080ae3878c63e2 (patch) | |
tree | 70b37007d0dccd7acda89d68bb91aac2a8510400 | |
parent | 5fae13057d44640c55a2fe5e09e118b6bacebd92 (diff) |
regulator:palmas: Sysfs node to change smps45 mode
This change creates a sysfs node
/sys/bus/platform/devices/palmas-pmic/auto_smps45_ctrl
echo 1 : force multi phase mode
echo 0: auto phase selection
Bug 1323712
Change-Id: Ibbac78cf841b1cda3444ad388426a0da4a67c38a
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/251057
GVS: Gerrit_Virtual_Submit
Tested-by: Xiao Bo Zhao <xiaoboz@nvidia.com>
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
-rw-r--r-- | drivers/regulator/palmas-regulator.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c index ef061eb83f06..a64572098cd4 100644 --- a/drivers/regulator/palmas-regulator.c +++ b/drivers/regulator/palmas-regulator.c @@ -1272,6 +1272,58 @@ err: return; } + +static ssize_t auto_smps45_ctrl_set(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + unsigned int reg_val, ret_val; + long set_val; + struct palmas *palmas = dev_get_drvdata(dev->parent); + ret_val = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®_val); + + if (ret_val < 0) { + dev_err(dev, "Not able to read registers\n"); + goto out; + } + + if (kstrtol(buf, 10, &set_val)) { + ret_val = -EINVAL; + goto out; + } + + set_val = set_val > 0 ? 0x2 : 0; + reg_val = reg_val & (~PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK); + if (set_val) { + reg_val = reg_val | + (set_val << PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT); + } + ret_val = palmas_smps_write(palmas, PALMAS_SMPS_CTRL, reg_val); + if (ret_val < 0) { + dev_err(dev, "Not able to write palmas register\n"); + goto out; + } + ret_val = count; +out: + return ret_val; +} + +static ssize_t auto_smps45_ctrl_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned int reg_val, ret_val; + struct palmas *palmas = dev_get_drvdata(dev->parent); + ret_val = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®_val); + if (ret_val < 0) { + dev_err(dev, "Not able to read palmas register"); + return -EINVAL; + } + reg_val = (reg_val & PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK) >> PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT; + return sprintf(buf, "%d\n", reg_val); +} + +DEVICE_ATTR(auto_smps45_ctrl, 0644, auto_smps45_ctrl_show, \ + auto_smps45_ctrl_set); + static __devinit int palmas_probe(struct platform_device *pdev) { struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); @@ -1482,6 +1534,12 @@ static __devinit int palmas_probe(struct platform_device *pdev) } } + if (device_create_file(&pdev->dev, &dev_attr_auto_smps45_ctrl)) { + dev_err(&pdev->dev, "failed to create sysfs\n"); + ret = -ENOMEM; + goto err_unregister_regulator; + } + /* Check if LDO8 is in tracking mode or not */ if (pdata->enable_ldo8_tracking) palmas_enable_ldo8_track(palmas); |