diff options
| author | Roger Quadros <rogerq@kernel.org> | 2023-11-09 14:21:06 +0200 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2023-11-09 14:55:43 -0600 |
| commit | 1fb38d47d735d2b104ea35b9a28fe311981e6a2e (patch) | |
| tree | a379ad228595011ffe38ec425ec49a10a1507ae2 | |
| parent | 05df5d6df22b5b9d6b991ed952f19a03433e87d0 (diff) | |
arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers
Exposing the entire CTRL_MMR space to syscon is not a good idea.
Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
in the USB0/USB1 nodes.
Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Andrew Davis <afd@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 |
4 files changed, 24 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 670986783c89..a8a156ce1dac 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -621,7 +621,7 @@ reg = <0x00 0x0f900000 0x00 0x800>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; @@ -644,7 +644,7 @@ reg = <0x00 0x0f910000 0x00 0x800>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index 65f27ed0e460..f6ae44e2ab98 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -17,6 +17,16 @@ compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 { diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index a888c57118e6..a1af618cee9e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -589,7 +589,7 @@ reg = <0x00 0x0f900000 0x00 0x800>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; @@ -612,7 +612,7 @@ reg = <0x00 0x0f910000 0x00 0x800>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi index c71919b0d181..a3a2ab24a9f1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -17,6 +17,16 @@ compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 { |