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authorRalf Baechle <ralf@linux-mips.org>2008-01-29 10:14:59 +0000
committerRalf Baechle <ralf@linux-mips.org>2008-01-29 10:14:59 +0000
commit39a51109dd14001185b0cd122ca46cce1d0795bf (patch)
treee9b56a844a07f9664a528471f6db2536bf370208
parent231a35d37293ab88d325a9cb94e5474c156282c0 (diff)
[MIPS] Extend performance counter event field.
The latest draft version of the MIPS Architecture Specification extends the 6 bit event field by adding a directly adjacent 4-bit EventExt field for a total of 10 bits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index bdfa07aecd97..ccbea229a0e6 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -19,7 +19,7 @@
#define M_PERFCTL_SUPERVISOR (1UL << 2)
#define M_PERFCTL_USER (1UL << 3)
#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
-#define M_PERFCTL_EVENT(event) (((event) & 0x3f) << 5)
+#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5)
#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)